[Intel-gfx] [PATCH 09/10] drm/i915: Disable LPT-H VGA dotclock during crtc disable

Ville Syrjälä ville.syrjala at linux.intel.com
Thu Dec 3 02:29:11 PST 2015


On Wed, Dec 02, 2015 at 03:02:20PM -0200, Paulo Zanoni wrote:
> 2015-12-01 11:08 GMT-02:00  <ville.syrjala at linux.intel.com>:
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> >
> > Currently we leave the LPT-H VGA dotclock running after turning
> > the pipe/fdi/port/etc. Propoerly disable the VGA dotclock as
> 
> s/Propoerly/Properly/
> 
> (DId you also notice that steps 13 and 18 are the same?)

No I didn't. That's a bit weird. I did notice that there seems to be an
off by one when it talks about dealing with FDI training failure. It
says:
"To retry FDI training, follow the Disable Sequence steps to Disable FDI,
but skip the steps related to clocks and PLLs (16, 19, and 20), ..."

But actually it should says "17, 20, and 21"

Which now makes me wonder that maybe they meant to move the FDI RX
disable to step 13 at some point, but simply forgot to remove it
from the old place in the sequence. That could explain the off by
one, and it would be more symmetrical with the enable sequence. We
seem to do the FDI RX disable at step 18 currently.

> 
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
> 
> > specified in the modeset sequence.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_display.c | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 322a35c67870..5e74456a90aa 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -5171,6 +5171,7 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
> >
> >         if (intel_crtc->config->has_pch_encoder) {
> >                 lpt_disable_pch_transcoder(dev_priv);
> > +               lpt_disable_iclkip(dev_priv);
> >                 intel_ddi_fdi_disable(crtc);
> >
> >                 intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
> > --
> > 2.4.10
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx at lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> 
> 
> -- 
> Paulo Zanoni

-- 
Ville Syrjälä
Intel OTC


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