[Intel-gfx] [MIPI SEQ PARSING v3 03/13] drm/i915: Add Intel opregion mailbox 5 structure
Mika Kahola
mika.kahola at intel.com
Fri Dec 11 00:42:31 PST 2015
On Tue, 2015-12-01 at 04:17 +0530, Deepak M wrote:
> Mailbox 5 is BIOS to Driver Notification mailbox is intended
> to support BIOS to Driver event notification or data storage
> for BIOS to Driver data synchronization purpose. Mailbox 5 is
> the extension of mailbox 3.
>
> Cc: Jani Nikula <jani.nikula at intel.com>
Tested-by: Mika Kahola <mika.kahola at intel.com>
> Signed-off-by: Deepak M <m.deepak at intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_opregion.c | 9 +++++++++
> 2 files changed, 10 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 71bd1dc..135d32a 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -457,6 +457,7 @@ struct intel_opregion {
> u32 swsci_sbcb_sub_functions;
> struct opregion_asle *asle;
> void *vbt;
> + struct opregion_asle_ext *asle_ext;
> u32 *lid_state;
> struct work_struct asle_work;
> };
> diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
> index 64efedf..43b7c3b 100644
> --- a/drivers/gpu/drm/i915/intel_opregion.c
> +++ b/drivers/gpu/drm/i915/intel_opregion.c
> @@ -46,6 +46,7 @@
> #define OPREGION_SWSCI_OFFSET 0x200
> #define OPREGION_ASLE_OFFSET 0x300
> #define OPREGION_VBT_OFFSET 0x400
> +#define OPREGION_ASLE_EXT_OFFSET 0x1C00
>
> #define OPREGION_SIGNATURE "IntelGraphicsMem"
> #define MBOX_ACPI (1<<0)
> @@ -125,6 +126,13 @@ struct opregion_asle {
> u8 rsvd[58];
> } __packed;
>
> +/* OpRegion mailbox #5: ASLE ext */
> +struct opregion_asle_ext {
> + u32 phed; /* Panel Header */
> + u32 bddc[64]; /* Panel EDID */
> + u32 rsvd[191];
> +} __packed;
> +
> /* Driver readiness indicator */
> #define ASLE_ARDY_READY (1 << 0)
> #define ASLE_ARDY_NOT_READY (0 << 0)
> @@ -936,6 +944,7 @@ int intel_opregion_setup(struct drm_device *dev)
> opregion->vbt = base + OPREGION_VBT_OFFSET;
>
> opregion->lid_state = base + ACPI_CLID;
> + opregion->asle_ext = base + OPREGION_ASLE_EXT_OFFSET;
>
> mboxes = opregion->header->mboxes;
> if (mboxes & MBOX_ACPI) {
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