[Intel-gfx] [PATCH i-g-t 2/7] tests/gem_mmap_gtt: Deal with tile sizes on gen2/3

Ville Syrjälä ville.syrjala at linux.intel.com
Tue Dec 15 13:30:36 PST 2015


On Tue, Dec 15, 2015 at 07:19:24PM -0200, Paulo Zanoni wrote:
> 2015-12-15 19:08 GMT-02:00 Ville Syrjälä <ville.syrjala at linux.intel.com>:
> > On Tue, Dec 15, 2015 at 06:51:56PM -0200, Paulo Zanoni wrote:
> >> 2015-12-14 18:15 GMT-02:00  <ville.syrjala at linux.intel.com>:
> >> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> >> >
> >> > Gen2/3 platforms have some unusual tile dimensions. Account
> >> > for them to make the test work correctly.
> >> >
> >> > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> >> > ---
> >> >  tests/gem_mmap_gtt.c | 20 +++++++++++++++++---
> >> >  1 file changed, 17 insertions(+), 3 deletions(-)
> >> >
> >> > diff --git a/tests/gem_mmap_gtt.c b/tests/gem_mmap_gtt.c
> >> > index 4d146426535b..b9c413b6160b 100644
> >> > --- a/tests/gem_mmap_gtt.c
> >> > +++ b/tests/gem_mmap_gtt.c
> >> > @@ -253,6 +253,18 @@ test_write_gtt(int fd)
> >> >         munmap(src, OBJECT_SIZE);
> >> >  }
> >> >
> >> > +static int tile_width(uint32_t devid, int tiling)
> >> > +{
> >> > +       if (intel_gen(devid) == 2)
> >> > +               return 128;
> >> > +       else if (tiling == I915_TILING_X)
> >> > +               return 512;
> >> > +       else if (IS_915(devid))
> >> > +               return 512;
> >> > +       else
> >> > +               return 128;
> >> > +}
> >> > +
> >>
> >> Would this be useful: http://patchwork.freedesktop.org/patch/66846/ ?
> >> I mean, we could export some subfunction out of the original patch.
> >
> > I suppose we might try to consolidate. One snag is that for display
> > stuff we want to use the modifiers, but I'm not sure we want to pollute
> > any fence stuff with those.
> >
> > BTW your Yf width is not correct for 8/64 bpp (width*height != 4k).
> 
> Hmmm, so I guess we need to discover if the Kernel's i915_tiling_ok()
> needs to be fixed.

No. That functions is all about fences. Fences and Yf don't mix.

> 
> >
> >>
> >> >  static void
> >> >  test_huge_bo(int fd, int huge, int tiling)
> >> >  {
> >> > @@ -261,7 +273,8 @@ test_huge_bo(int fd, int huge, int tiling)
> >> >         char *tiled_pattern;
> >> >         char *linear_pattern;
> >> >         uint64_t size, last_offset;
> >> > -       int pitch = tiling == I915_TILING_Y ? 128 : 512;
> >> > +       uint32_t devid = intel_get_drm_devid(fd);
> >> > +       int pitch = tile_width(devid, tiling);
> >> >         int i;
> >> >
> >> >         switch (huge) {
> >> > @@ -327,6 +340,7 @@ test_huge_bo(int fd, int huge, int tiling)
> >> >  static void
> >> >  test_huge_copy(int fd, int huge, int tiling_a, int tiling_b)
> >> >  {
> >> > +       uint32_t devid = intel_get_drm_devid(fd);
> >> >         uint64_t huge_object_size, i;
> >> >         uint32_t bo, *pattern_a, *pattern_b;
> >> >         char *a, *b;
> >> > @@ -357,7 +371,7 @@ test_huge_copy(int fd, int huge, int tiling_a, int tiling_b)
> >> >
> >> >         bo = gem_create(fd, huge_object_size);
> >> >         if (tiling_a)
> >> > -               igt_require(__gem_set_tiling(fd, bo, tiling_a, tiling_a == I915_TILING_Y ? 128 : 512) == 0);
> >> > +               igt_require(__gem_set_tiling(fd, bo, tiling_a, tile_width(devid, tiling_a)) == 0);
> >> >         a = __gem_mmap__gtt(fd, bo, huge_object_size, PROT_READ | PROT_WRITE);
> >> >         igt_require(a);
> >> >         gem_close(fd, bo);
> >> > @@ -367,7 +381,7 @@ test_huge_copy(int fd, int huge, int tiling_a, int tiling_b)
> >> >
> >> >         bo = gem_create(fd, huge_object_size);
> >> >         if (tiling_b)
> >> > -               igt_require(__gem_set_tiling(fd, bo, tiling_b, tiling_b == I915_TILING_Y ? 128 : 512) == 0);
> >> > +               igt_require(__gem_set_tiling(fd, bo, tiling_b, tile_width(devid, tiling_b)) == 0);
> >> >         b = __gem_mmap__gtt(fd, bo, huge_object_size, PROT_READ | PROT_WRITE);
> >> >         igt_require(b);
> >> >         gem_close(fd, bo);
> >> > --
> >> > 2.4.10
> >> >
> >> > _______________________________________________
> >> > Intel-gfx mailing list
> >> > Intel-gfx at lists.freedesktop.org
> >> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> >>
> >>
> >>
> >> --
> >> Paulo Zanoni
> >
> > --
> > Ville Syrjälä
> > Intel OTC
> 
> 
> 
> -- 
> Paulo Zanoni

-- 
Ville Syrjälä
Intel OTC


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