[Intel-gfx] [PATCH] drm/i915: Move Braswell stop_machine GGTT insertion workaround

[Daniel Vetter]

On Wed, Dec 16, 2015 at 10:02:29PM +0200, Ville Syrjälä wrote:
> On Wed, Nov 18, 2015 at 03:19:39PM +0000, Chris Wilson wrote:
> > There was a silent conflict between
> > 
> > commit 0a878716265e9af9f697264dc2e858fcc060d833
> > Author: Daniel Vetter <daniel.vetter at ffwll.ch>
> > Date:   Thu Oct 15 14:23:01 2015 +0200
> > 
> >     drm/i915: restore ggtt double-bind avoidance
> > 
> > and
> > 
> > commit 5bab6f60cb4d1417ad7c599166bcfec87529c1a2
> > Author: Chris Wilson <chris at chris-wilson.co.uk>
> > Date:   Fri Oct 23 18:43:32 2015 +0100
> > 
> >     drm/i915: Serialise updates to GGTT with access through GGTT on Braswell
> > 
> > thankfully caught by the extra WARN safegaurd in 0a878716. Since we now
> > override the GGTT insert_pages callback when installing the aliasing
> > ppgtt, we assert that the callback is the original ggtt routine.
> > However, on Braswell we now use a different insertion routine to
> > serialise access through the GGTT with updating the PTE and hence the
> > conflict. To avoid the conflict, move the custom insertion routine for
> > Braswell down a level.
> > 
> > Reported-by: Ville Syrjälä <ville.syrjala at linux.intel.com
> > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> > Cc: Ville Syrjälä <ville.syrjala at linux.intel.com
> > Cc: Daniel Vetter <daniel.vetter at ffwll.ch>
> > Cc: Michel Thierry <michel.thierry at intel.com>
> > Cc: Mika Kuoppala <mika.kuoppala at intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_gem_gtt.c | 50 +++++++++++++++++++++----------------
> >  1 file changed, 28 insertions(+), 22 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > index 4d357e18e5d1..8cd271fa2396 100644
> > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > @@ -2386,6 +2386,32 @@ static void gen8_ggtt_insert_entries(struct i915_address_space *vm,
> >  	POSTING_READ(GFX_FLSH_CNTL_GEN6);
> >  }
> >  
> > +struct insert_entries {
> > +	struct i915_address_space *vm;
> > +	struct sg_table *st;
> > +	uint64_t start;
> > +	enum i915_cache_level level;
> > +	u32 flags;
> > +};
> > +
> > +static int gen8_ggtt_insert_entries__cb(void *_arg)
> > +{
> > +	struct insert_entries *arg = _arg;
> > +	gen8_ggtt_insert_entries(arg->vm, arg->st,
> > +				 arg->start, arg->level, arg->flags);
> > +	return 0;
> > +}
> > +
> > +static void gen8_ggtt_insert_entries__BKL(struct i915_address_space *vm,
> > +					  struct sg_table *st,
> > +					  uint64_t start,
> > +					  enum i915_cache_level level,
> > +					  u32 flags)
> > +{
> > +	struct insert_entries arg = { vm, st, start, level, flags };
> 
> Could use named initializers to avoid potential accidents with the
> weaker typed members. But the struct definition is close by so not a
> huge risk.
> 
> Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Tested-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Queued for -next (including cc: fixes), thanks for the patch.
-Daniel

> 
> > +	stop_machine(gen8_ggtt_insert_entries__cb, &arg, NULL);
> > +}
> > +
> >  /*
> >   * Binds an object into the global gtt with the specified cache level. The object
> >   * will be accessible to the GPU via commands whose operands reference offsets
> > @@ -2534,26 +2560,6 @@ static int ggtt_bind_vma(struct i915_vma *vma,
> >  	return 0;
> >  }
> >  
> > -struct ggtt_bind_vma__cb {
> > -	struct i915_vma *vma;
> > -	enum i915_cache_level cache_level;
> > -	u32 flags;
> > -};
> > -
> > -static int ggtt_bind_vma__cb(void *_arg)
> > -{
> > -	struct ggtt_bind_vma__cb *arg = _arg;
> > -	return ggtt_bind_vma(arg->vma, arg->cache_level, arg->flags);
> > -}
> > -
> > -static int ggtt_bind_vma__BKL(struct i915_vma *vma,
> > -			      enum i915_cache_level cache_level,
> > -			      u32 flags)
> > -{
> > -	struct ggtt_bind_vma__cb arg = { vma, cache_level, flags };
> > -	return stop_machine(ggtt_bind_vma__cb, &arg, NULL);
> > -}
> > -
> >  static int aliasing_gtt_bind_vma(struct i915_vma *vma,
> >  				 enum i915_cache_level cache_level,
> >  				 u32 flags)
> > @@ -3021,8 +3027,8 @@ static int gen8_gmch_probe(struct drm_device *dev,
> >  	dev_priv->gtt.base.bind_vma = ggtt_bind_vma;
> >  	dev_priv->gtt.base.unbind_vma = ggtt_unbind_vma;
> >  
> > -	if (IS_CHERRYVIEW(dev))
> > -		dev_priv->gtt.base.bind_vma = ggtt_bind_vma__BKL;
> > +	if (IS_CHERRYVIEW(dev_priv))
> > +		dev_priv->gtt.base.insert_entries = gen8_ggtt_insert_entries__BKL;
> >  
> >  	return ret;
> >  }
> > -- 
> > 2.6.2
> 
> -- 
> Ville Syrjälä
> Intel OTC

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch