[Intel-gfx] [PATCH] RFC: drm: add support for tiled/compressed/etc modifier in addfb2 (v1.5)

shuang.he at intel.com shuang.he at intel.com
Mon Feb 2 15:14:55 PST 2015


Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he at intel.com)
Task id: 5678
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                 -8              353/353              345/353
ILK                                  355/355              355/355
SNB                                  400/422              400/422
IVB              +2                 485/487              487/487
BYT                                  296/296              296/296
HSW              +1                 507/508              508/508
BDW                                  401/402              401/402
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
*PNV  igt_gem_concurrent_blit_gpuX-bcs-gpu-read-after-write-interruptible      PASS(2, M25M7)      FAIL(1, M7)
*PNV  igt_gem_concurrent_blit_prw-rcs-early-read-interruptible      PASS(2, M25M7)      FAIL(1, M7)
*PNV  igt_gem_userptr_blits_coherency-sync      PASS(2, M25M7)      CRASH(1, M7)
*PNV  igt_gem_userptr_blits_coherency-unsync      PASS(2, M25M7)      NRUN(1, M7)
*PNV  igt_gen3_render_linear_blits      PASS(6, M25M23M7)      FAIL(1, M7)
*PNV  igt_gen3_render_mixed_blits      PASS(2, M25M7)      FAIL(1, M7)
*PNV  igt_gen3_render_tiledx_blits      PASS(2, M25M7)      FAIL(1, M7)
*PNV  igt_gen3_render_tiledy_blits      PASS(2, M25M7)      FAIL(1, M7)
 IVB  igt_gem_pwrite_pread_snooped-pwrite-blt-cpu_mmap-performance      DMESG_WARN(8, M34M21)PASS(10, M4M34)      PASS(1, M4)
 IVB  igt_gem_storedw_batches_loop_normal      DMESG_WARN(7, M34M4M21)PASS(18, M34M4M21)      PASS(1, M4)
 HSW  igt_gem_pwrite_pread_snooped-pwrite-blt-cpu_mmap-performance      DMESG_WARN(2, M40)PASS(22, M40M20)      PASS(1, M40)
Note: You need to pay more attention to line start with '*'


More information about the Intel-gfx mailing list