[Intel-gfx] [PATCH 1/2] drm/i915: gen 9 h/w w/a Fix stepping check

Damien Lespiau damien.lespiau at intel.com
Fri Feb 6 03:52:42 PST 2015


On Fri, Feb 06, 2015 at 11:30:03AM +0000, Nick Hoath wrote:
> Fixed the stepping check on WaDisableDgMirrorFixInHalfSliceChicken5
> to be for the correct SOC (Skylake)
> 
> Signed-off-by: Nick Hoath <nicholas.hoath at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ringbuffer.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 573b80f..fb71e33 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -886,7 +886,8 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
>  	WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN3,
>  			  GEN9_DISABLE_OCL_OOB_SUPPRESS_LOGIC);
>  
> -	if (INTEL_REVID(dev) == SKL_REVID_A0) {
> +	if (INTEL_REVID(dev) >= SKL_REVID_A0 &&
> +	    INTEL_REVID(dev) <= SKL_REVID_B0) {

 x >= 0 && x <= 1 looks really better as x == 0 || x == 1

Otherwise:

Reviewed-by: Damien Lespiau <damien.lespiau at intel.com>

>  		/*
>  		* WaDisableDgMirrorFixInHalfSliceChicken5:skl
>  		* This is a pre-production w/a.
> -- 
> 2.1.1
> 


More information about the Intel-gfx mailing list