[Intel-gfx] [PATCH 1/5] drm/i915: Add tiled framebuffer modifiers

[Tvrtko Ursulin]

On 02/09/2015 06:03 PM, Daniel Vetter wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
>
> To be used from the new addfb2 extension.
>
> v2:
> - Drop Intel-specific untiled modfier.
> - Move to drm_fourcc.h.
> - Document layouts a bit and denote them as platform-specific and not
>    useable for cross-driver sharing.
> - Add Y-tiling for completeness.
> - Drop special docstring markers to avoid confusing kerneldoc.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch> (v2)
> ---
>   drivers/gpu/drm/i915/i915_drv.h |  1 +
>   include/uapi/drm/drm_fourcc.h   | 31 +++++++++++++++++++++++++++++++
>   2 files changed, 32 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 217845951b7f..a027a983c82b 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -31,6 +31,7 @@
>   #define _I915_DRV_H_
>
>   #include <uapi/drm/i915_drm.h>
> +#include <uapi/drm/drm_fourcc.h>
>
>   #include "i915_reg.h"
>   #include "intel_bios.h"
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> index 622109677747..886814c6f9d2 100644
> --- a/include/uapi/drm/drm_fourcc.h
> +++ b/include/uapi/drm/drm_fourcc.h
> @@ -164,4 +164,35 @@
>    * authoritative source for all of these.
>    */
>
> +/* Intel framebuffer modifiers */
> +
> +/*
> + * Intel X-tiling layout
> + *
> + * This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)
> + * in row-major layout. Within the tile bytes are laid out row-major, with
> + * a platform-dependent stride. On top of that the memory can apply
> + * platform-depending swizzling of some higher address bits into bit6.
> + *
> + * This format is highly platforms specific and not useful for cross-driver
> + * sharing. It exists since on a given platform it does uniquely identify the
> + * layout in a simple way for i915-specific userspace.
> + */
> +#define I915_FORMAT_MOD_X_TILED	fourcc_mod_code(INTEL, 1)
> +
> +/*
> + * Intel Y-tiling layout
> + *
> + * This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)
> + * in row-major layout. Within the tile bytes are laid out in OWORD (16 bytes)
> + * chunks column-major, with a platform-dependent height. On top of that the
> + * memory can apply platform-depending swizzling of some higher address bits
> + * into bit6.
> + *
> + * This format is highly platforms specific and not useful for cross-driver
> + * sharing. It exists since on a given platform it does uniquely identify the
> + * layout in a simple way for i915-specific userspace.
> + */
> +#define I915_FORMAT_MOD_Y_TILED	fourcc_mod_code(INTEL, 1)

X was one, so this could be two.

Regards,

Tvrtko