[Intel-gfx] About CTX_CONTEXT_CONTROL initialization in populate_lr_context() intel_lrc.c

[Wang, Zhi A]

Hi Thomas:
    Thanks for the information! Learned a lot. :) 

I remember that semaphore is disabled on Gen8 for a long time ago. Recently I found it has been enabled. just thought that if a workload which isn't being protected by MI_ARB_ON_OFF may be switched out by failing to wait semaphore here without that bit?

Would you mind to give a help to confirm the correct combos? That would be nice and great helpful to me :)

a. Set "Inhibit Synchronous Context Switch" bit, HW will wait until the condition is true or specific event is generated if SW issue some instructions like MI_SEMAPHORE_WAIT, I thought that's why SW don't need to process CSB with wait_semaphore bit set. But if MI_ARB_ON_OFF is ON, Can SW do a preemption here by submitting a new ELSP write combo? 

b. Clear "Inhibit Synchronous Context Switch", HW will switch out context directly after the condition is false or specific event is not generated at that time, and write a CSB with wait_semaphore bit is set. And SW has to be aware this kinds of CSB in this case I think...

Don't know if there is something I missed...:) Thanks.

-----Original Message-----
From: Daniel, Thomas 
Sent: Tuesday, February 10, 2015 10:17 PM
To: Wang, Zhi A; Wang, Zhi A; Intel-gfx at lists.freedesktop.org
Subject: RE: About CTX_CONTEXT_CONTROL initialization in populate_lr_context() intel_lrc.c

> -----Original Message-----
> From: Intel-gfx [mailto:intel-gfx-bounces at lists.freedesktop.org] On 
> Behalf Of Wang, Zhi A
> Sent: Tuesday, February 10, 2015 1:27 PM
> To: Wang, Zhi A; Intel-gfx at lists.freedesktop.org
> Subject: Re: [Intel-gfx] About CTX_CONTEXT_CONTROL initialization in
> populate_lr_context() intel_lrc.c
> 
> Ping. If someone can confirm it. I can submit a patch, but I'm 
> concerned about introducing new register bit needs some internal process....
> 
> -----Original Message-----
> From: Intel-gfx [mailto:intel-gfx-bounces at lists.freedesktop.org] On 
> Behalf Of Wang, Zhi A
> Sent: Monday, February 09, 2015 11:05 PM
> To: Intel-gfx at lists.freedesktop.org
> Subject: [Intel-gfx] About CTX_CONTEXT_CONTROL initialization in
> populate_lr_context() intel_lrc.c
> 
> Hi Gurus:
>   Forgive my junior HW knowledge, I just found that in execlist 
> context initialization function populate_lr_context(), this line:
> 
>           reg_state[CTX_CONTEXT_CONTROL+1] =
>                           _MASKED_BIT_ENABLE((1<<3) | 
> MI_RESTORE_INHIBIT);
> 
> It seems the "Inhibit Synchronous Context Switch" bit is not set here, 
> so when HW is trying to wait some events, e.g. semaphore, according to 
> Bspec, per my basic understanding, it will switch out current context 
> with some reason bit set. Here comes my question, I think if this 
> situation happen, should i915 remember this context and try to 
> re-schedule it in a proper time, e.g. before submitting a new context 
> until the context_completed bit in CSB is set? I don't find a register 
> that will remember the context switched out by waiting event, so I 
> think it should be i915 to handle this situation or just set "Inhibit Synchronous Context Switch" bit here?...

I don't think any of these events will be generated when execlists are enabled.  I think there is a plan to use semaphores again, and a similar codepath will be needed to deal with context pre-emption when we support that, in order to re-submit pre-empted contexts.

Thomas.