[Intel-gfx] [PATCH 04/15] drm/i915: Parse VBT PSR block.

[Damien Lespiau]

On Fri, Nov 14, 2014 at 08:52:30AM -0800, Rodrigo Vivi wrote:
> +struct psr_table {
> +	/* Feature bits */
> +	u8 full_link:1;
> +	u8 require_aux_to_wakeup:1;
> +	u8 feature_bits_rsvd:6;
> +
> +	/* Wait times */
> +	u8 idle_frames:4;
> +	u8 lines_to_wait:3;
> +	u8 wait_times_rsvd:1;
> +
> +	/* TP wake up time in multiple of 100 */
> +	u16 tp1_wakeup_time;
> +	u16 tp2_tp3_wakeup_time;
> +} __packed;

...

> +	/* Allowed VBT values goes from 0 to 15 */
> +	dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
> +		psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;


smatch gives a warning here saying those conditions are always true.
psr_table->idle_frames being 4 bits in a bitfield, we can see that
smatch may well be right.

-- 
Damien