[Intel-gfx] [PATCH 4/4] drm/i915: Work around DISPLAY_PHY_CONTROL register corruption on CHV
shuang.he at intel.com
shuang.he at intel.com
Thu Feb 12 08:00:10 PST 2015
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he at intel.com)
Task id: 5761
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 282/282 282/282
ILK 313/313 313/313
SNB 309/323 309/323
IVB 380/380 380/380
BYT 296/296 296/296
HSW -2 425/425 423/425
BDW -1 318/318 317/318
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
HSW igt_kms_flip_plain-flip-fb-recreate TIMEOUT(1)PASS(1) TIMEOUT(1)
HSW igt_kms_flip_plain-flip-fb-recreate-interruptible TIMEOUT(2)PASS(1) TIMEOUT(1)
*BDW igt_gem_gtt_hog PASS(6) DMESG_WARN(1)PASS(1)
Note: You need to pay more attention to line start with '*'
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