[Intel-gfx] [PATCH 6/9] drm/i915: Update intel_dp_compute_config() to handle compliance test requests
Todd Previte
tprevite at gmail.com
Wed Feb 18 19:00:34 PST 2015
Adds provisions in intel_dp_compute_config() to accommodate compliance
testing. Mostly this invovles circumventing the automatic link configuration
parameters and allowing the compliance code to set those parameters as
required by the tests.
V2:
- N/A
V3:
- Moved color range check down under the compliance_exit tag
Signed-off-by: Todd Previte <tprevite at gmail.com>
---
drivers/gpu/drm/i915/intel_dp.c | 38 +++++++++++++++++++++++++++-----------
1 file changed, 27 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index e69cdad..2d83f13 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1191,6 +1191,21 @@ intel_dp_compute_config(struct intel_encoder *encoder,
pipe_config->has_drrs = false;
pipe_config->has_audio = intel_dp->has_audio;
+ /* Compliance testing should skip most of this function */
+ if (!is_edp(intel_dp) && intel_dp->compliance_testing_active) {
+ bpp = intel_dp->compliance_config.bits_per_pixel;
+ lane_count = intel_dp->compliance_config.lane_count;
+ clock = intel_dp->compliance_config.link_rate >> 3;
+ /* Assign here and skip at the end - ensures correct values */
+ intel_dp->link_bw = bws[clock];
+ intel_dp->lane_count = lane_count;
+ pipe_config->pipe_bpp = bpp;
+ pipe_config->port_clock =
+ drm_dp_bw_code_to_link_rate(intel_dp->link_bw);
+
+ goto compliance_exit;
+ }
+
if (is_edp(intel_dp) && intel_connector->panel.fixed_mode) {
intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
adjusted_mode);
@@ -1251,6 +1266,18 @@ intel_dp_compute_config(struct intel_encoder *encoder,
return false;
found:
+ intel_dp->link_bw = bws[clock];
+ intel_dp->lane_count = lane_count;
+ pipe_config->pipe_bpp = bpp;
+ pipe_config->port_clock = drm_dp_bw_code_to_link_rate(intel_dp->link_bw);
+
+ DRM_DEBUG_KMS("DP link bw %02x lane count %d clock %d bpp %d\n",
+ intel_dp->link_bw, intel_dp->lane_count,
+ pipe_config->port_clock, bpp);
+ DRM_DEBUG_KMS("DP link bw required %i available %i\n",
+ mode_rate, link_avail);
+
+compliance_exit:
if (intel_dp->color_range_auto) {
/*
* See:
@@ -1266,17 +1293,6 @@ found:
if (intel_dp->color_range)
pipe_config->limited_color_range = true;
- intel_dp->link_bw = bws[clock];
- intel_dp->lane_count = lane_count;
- pipe_config->pipe_bpp = bpp;
- pipe_config->port_clock = drm_dp_bw_code_to_link_rate(intel_dp->link_bw);
-
- DRM_DEBUG_KMS("DP link bw %02x lane count %d clock %d bpp %d\n",
- intel_dp->link_bw, intel_dp->lane_count,
- pipe_config->port_clock, bpp);
- DRM_DEBUG_KMS("DP link bw required %i available %i\n",
- mode_rate, link_avail);
-
intel_link_compute_m_n(bpp, lane_count,
adjusted_mode->crtc_clock,
pipe_config->port_clock,
--
1.9.1
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