[Intel-gfx] [PATCH 4/6] drm/i915: Enable eDP DRRS for CHV

[Rodrigo Vivi]

On Fri, Feb 13, 2015 at 2:03 AM, Ramalingam C <ramalingam.c at intel.com> wrote:
> From: Durgadoss R <durgadoss.r at intel.com>
>
> This patch enables eDP DRRS for CHV by adding the
> required IS_CHERRYVIEW() checks.
> CHV uses the same register bit as VLV.
>
> [Vandana]: Since CHV has 2 sets of M_N registers, it will follow the same code
> path as gen < 8. Added CHV check in dp_set_m_n()
>
> [Ram]: Rebased on top of previous patch modifications
>
> Signed-off-by: Durgadoss R <durgadoss.r at intel.com>
> Signed-off-by: Vandana Kannan <vandana.kannan at intel.com>
> Signed-off-by: Ramalingam C <ramalingam.c at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c |    2 +-
>  drivers/gpu/drm/i915/intel_dp.c      |    2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 2af24a7..6548524 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5879,7 +5879,7 @@ static void intel_cpu_transcoder_set_m_n(struct intel_crtc *crtc,
>                  * for gen < 8) and if DRRS is supported (to make sure the
>                  * registers are not unnecessarily accessed).
>                  */
> -               if (m2_n2 && INTEL_INFO(dev)->gen < 8 &&
> +               if (m2_n2 && (IS_CHERRYVIEW(dev) || INTEL_INFO(dev)->gen < 8) &&
This got a bit confusing and something that looks like it will need
fix on next enablings...
>                         crtc->config->has_drrs) {
>                         I915_WRITE(PIPE_DATA_M2(transcoder),
>                                         TU_SIZE(m2_n2->tu) | m2_n2->gmch_m);
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 9f3da8f..dfbe97d 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -4793,7 +4793,7 @@ static void intel_dp_set_drrs_state(struct drm_device *dev, int refresh_rate)
>                 return;
>         }
>
> -       if (INTEL_INFO(dev)->gen >= 8) {
> +       if (INTEL_INFO(dev)->gen >= 8 && !IS_CHERRYVIEW(dev)) {
>                 switch (index) {
>                 case DRRS_HIGH_RR:
>                         intel_dp_set_m_n(intel_crtc, M1_N1);
> --
> 1.7.9.5
>
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But apparently is right, so feel free to use:
Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>

-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br