[Intel-gfx] [PATCH 4/4] drm/i915/skl: Program PLL for edp1.4 intermediate frequencies
shuang.he at intel.com
shuang.he at intel.com
Sat Feb 21 00:23:04 PST 2015
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he at intel.com)
Task id: 5802
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV -5 277/277 272/277
ILK 313/313 313/313
SNB 309/309 309/309
IVB 382/382 382/382
BYT 296/296 296/296
HSW 425/425 425/425
BDW -1 318/318 317/318
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
*PNV igt_gem_fence_thrash_bo-write-verify-none NRUN(1)PASS(6) FAIL(1)PASS(1)
*PNV igt_gem_fence_thrash_bo-write-verify-x PASS(7) FAIL(1)NO_RESULT(1)
*PNV igt_gem_fence_thrash_bo-write-verify-y NO_RESULT(1)PASS(7) FAIL(1)NO_RESULT(1)
PNV igt_gem_userptr_blits_coherency-sync NO_RESULT(1)CRASH(6)NRUN(1)PASS(6) NO_RESULT(1)CRASH(1)
*PNV igt_gem_userptr_blits_coherency-unsync CRASH(4)NRUN(1)PASS(4) NO_RESULT(1)CRASH(1)
*BDW igt_gem_gtt_hog PASS(19) DMESG_WARN(1)PASS(1)
Note: You need to pay more attention to line start with '*'
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