[Intel-gfx] [PATCH 3/7] drm/i915: gen5+ can have FBC with multiple pipes

[Daniel Vetter]

On Fri, Feb 13, 2015 at 05:23:43PM -0200, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni at intel.com>
> 
> So allow it.
> 
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>

Merged up to this one to dinq. The subsequent patches look good, but as
per our irc discussion I think it would be useful if Rodrigo could take
another look and update his review.

Thanks, Daniel

> ---
>  drivers/gpu/drm/i915/intel_fbc.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
> index 6406b14..618f7bd 100644
> --- a/drivers/gpu/drm/i915/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/intel_fbc.c
> @@ -477,17 +477,19 @@ static struct drm_crtc *intel_fbc_find_crtc(struct drm_i915_private *dev_priv)
>  {
>  	struct drm_crtc *crtc = NULL, *tmp_crtc;
>  	enum pipe pipe;
> -	bool pipe_a_only = false;
> +	bool pipe_a_only = false, one_pipe_only = false;
>  
>  	if (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8)
>  		pipe_a_only = true;
> +	else if (INTEL_INFO(dev_priv)->gen <= 4)
> +		one_pipe_only = true;
>  
>  	for_each_pipe(dev_priv, pipe) {
>  		tmp_crtc = dev_priv->pipe_to_crtc_mapping[pipe];
>  
>  		if (intel_crtc_active(tmp_crtc) &&
>  		    to_intel_crtc(tmp_crtc)->primary_enabled) {
> -			if (crtc) {
> +			if (one_pipe_only && crtc) {
>  				if (set_no_fbc_reason(dev_priv, FBC_MULTIPLE_PIPES))
>  					DRM_DEBUG_KMS("more than one pipe active, disabling compression\n");
>  				return NULL;
> -- 
> 2.1.4
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch