[Intel-gfx] [PATCH v2 00/24] PPGTT dynamic page allocations

Daniel Vetter daniel at ffwll.ch
Mon Jan 5 06:57:00 PST 2015


On Tue, Dec 23, 2014 at 05:16:03PM +0000, Michel Thierry wrote:
> Addressing comments from v1.
> 
> For GEN8, it has also been extended to work in logical ring submission (lrc)
> mode, as it will be the preferred mode of operation.
> I also tried to update the lrc code at the same time the ppgtt refactoring
> occurred, leaving only one patch that is exclusively for lrc.
> 
> This list can be seen in 3 parts:
> [01-10] Include code rework for PPGTT (all GENs).
> [11-14] Adds page table allocation for GEN6/GEN7
> [15-24] Enables dynamic allocation in GEN8. It is enabled for both legacy
> and execlist submission modes.

Ok, I think I start to see the forrest for the individual trees here.
Thanks for reworking the series.

More comments in replies to individual patches. I've mostly concentrated
on the gen6/7 code and mostly ignored the details for bdw, but where
applicapable please do similar adjustments.

Since there's a bunch of simpler prep patches please start with the
detailed review even when some of the later patches are still under
discussion. That way I can start with merging. Otherwise I think we can go
to the detailed review phase for the entire series with my comments
addressed (and starting with the review while doing some of these reworks
probably helps the reviewer, too).

Thanks, Daniel

> 
> Ben Widawsky (23):
>   drm/i915: Add some extra guards in evict_vm
>   drm/i915/trace: Fix offsets for 64b
>   drm/i915: Rename to GEN8_LEGACY_PDPES
>   drm/i915: Setup less PPGTT on failed pagedir
>   drm/i915/gen8: Un-hardcode number of page directories
>   drm/i915: Range clearing is PPGTT agnostic
>   drm/i915: page table abstractions
>   drm/i915: Complete page table structures
>   drm/i915: Create page table allocators
>   drm/i915: Track GEN6 page table usage
>   drm/i915: Extract context switch skip and pd load logic
>   drm/i915: Track page table reload need
>   drm/i915: Initialize all contexts
>   drm/i915: Finish gen6/7 dynamic page table allocation
>   drm/i915/bdw: Use dynamic allocation idioms on free
>   drm/i915/bdw: pagedirs rework allocation
>   drm/i915/bdw: pagetable allocation rework
>   drm/i915/bdw: Update pdp switch and point unused PDPs to scratch page
>   drm/i915: num_pd_pages/num_pd_entries isn't useful
>   drm/i915: Extract PPGTT param from pagedir alloc
>   drm/i915/bdw: Split out mappings
>   drm/i915/bdw: begin bitmap tracking
>   drm/i915/bdw: Dynamic page table allocations
> 
> Michel Thierry (1):
>   drm/i915/bdw: Dynamic page table allocations in lrc mode
> 
>  drivers/gpu/drm/i915/i915_debugfs.c        |    7 +-
>  drivers/gpu/drm/i915/i915_gem.c            |   11 +
>  drivers/gpu/drm/i915/i915_gem_context.c    |   62 +-
>  drivers/gpu/drm/i915/i915_gem_evict.c      |    3 +
>  drivers/gpu/drm/i915/i915_gem_execbuffer.c |   11 +
>  drivers/gpu/drm/i915/i915_gem_gtt.c        | 1200 ++++++++++++++++++++--------
>  drivers/gpu/drm/i915/i915_gem_gtt.h        |  250 +++++-
>  drivers/gpu/drm/i915/i915_trace.h          |  123 ++-
>  drivers/gpu/drm/i915/intel_lrc.c           |   80 +-
>  9 files changed, 1360 insertions(+), 387 deletions(-)
> 
> -- 
> 2.1.1
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch


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