[Intel-gfx] [PULL] drm-intel-next
Daniel Vetter
daniel.vetter at ffwll.ch
Wed Jan 7 01:31:49 PST 2015
Hi Dave,
drm-intel-next-2014-12-19:
- plane handling refactoring from Matt Roper and Gustavo Padovan in prep for
atomic updates
- fixes and more patches for the seqno to request transformation from John
- docbook for fbc from Rodrigo
- prep work for dual-link dsi from Gaurav Signh
- crc fixes from Ville
- special ggtt views infrastructure from Tvrtko Ursulin
- shadow patch copying for the cmd parser from Brad Volkin
- execlist and full ppgtt by default on gen8, for testing for now
drm-intel-next-2014-12-05:
- dual-dsi enabling from Gaurav with prep work from Jani
- reshuffling the ring init code to move towards a clean sw/hw state setup split
- ring free space refactoring from Dave Gordon
- s/seqno/request/ rework from John Harrison
- psr support for vlv/chv from Rodrigo
- skl mmio flip support from Damien
- and the usual bits&pieces all over
Cheers, Daniel
The following changes since commit 00f0b3781028605910cb4662a0f8a4849b445fc2:
drm/i915: Reject modeset when the same digital port is used more than once (2014-12-03 09:31:53 +0100)
are available in the git repository at:
git://anongit.freedesktop.org/drm-intel tags/drm-intel-next-2014-12-19
for you to fetch changes up to 0e2cfc005b376ed7b5c9a9fc466b5842fcc18cc7:
drm/i915: Update DRIVER_DATE to 20141219 (2014-12-19 16:21:42 +0100)
----------------------------------------------------------------
- plane handling refactoring from Matt Roper and Gustavo Padovan in prep for
atomic updates
- fixes and more patches for the seqno to request transformation from John
- docbook for fbc from Rodrigo
- prep work for dual-link dsi from Gaurav Signh
- crc fixes from Ville
- special ggtt views infrastructure from Tvrtko Ursulin
- shadow patch copying for the cmd parser from Brad Volkin
- execlist and full ppgtt by default on gen8, for testing for now
----------------------------------------------------------------
Ander Conselvan de Oliveira (1):
drm/i915: Remove unnecessary goto in intel_primary_plane_disable()
Brad Volkin (5):
drm/i915: Implement a framework for batch buffer pools
drm/i915: Use batch pools with the command parser
drm/i915: Use batch length instead of object size in command parser
drm/i915: Mark shadow batch buffers as purgeable
drm/i915: Tidy up execbuffer command parsing code
Chris Wilson (1):
drm/i915: Assert that we successfully downclock the GPU before suspend
Damien Lespiau (8):
drm/i915/skl: Read out crtl1 for eDP/DPLL0
drm/i915/skl: Implement the skl version of MMIO flips
drm/i915: Fix short description of intel_display_power_is_enabled()
drm/i915/skl: Update the DDI translation values for DP/eDP 1.3
drm/i915: Don't display nonsensical values in i915_ddb_info on gen < 9
drm/i915: Add headers to the various render state
drm/i915: Consolidate DDI clock reading out in a single function
drm/i915/skl: Skylake also supports DP MST
Daniel Vetter (16):
drm/i915: Remove user pinning code
drm/i915: Convert i915_wait_seqno to i915_wait_request
drm/i915: Check locking in i915_gem_request_unreference
drm/i915: Remove redundant flip_work->flip_queued_ring
drm/i915: s/init()/init_hw()/ in intel_engine_cs
drm/i915: Move intel_init_pipe_control out of engine->init_hw
drm/i915: Only init engines once
drm/i915: Flatten engine init control flow
drm/i915: Move init_unused_rings to gem_init_hw
drm/i915: Update DRIVER_DATE to 20141205
drm/i915: Move golden context init into ->init_context
drm/i915: Check mask/bit helper functions
drm/i915: Protect against leaks in pipe_crc_set_source
drm/i915: Name the lrc irq handler correctly
drm/i915: Use BUILD_BUG if possible in the i915 WARN_ON
drm/i915: Update DRIVER_DATE to 20141219
Dave Gordon (4):
drm/i915: Check for matching ringbuffer in logical_ring_wait_request()
drm/i915: Don't read 'HEAD' MMIO register in LRC mode
drm/i915: Make ring freespace calculation more robust
drm/i915: Consolidate ring freespace calculations
Deepak M (1):
drm/i915: Parsing LFP brightness control from VBT
Deepak S (3):
drm/i915: Forcewake Register Range changes for CHV
drm/i915/chv: Use timeout mode for RC6 on chv
drm/i915: Skip gunit save/restore for cherryview
Gaurav K Singh (14):
drm/i915: New functions added for enabling & disabling MIPI Port Ctrl reg
drm/i915: Added port as parameter to the functions which does read/write of DSI Controller
drm/i915: Add support for port enable/disable for dual link configuration
drm/i915: Pixel Clock changes for DSI dual link
drm/i915: Dual link needs Shutdown and Turn on packet for both ports
drm/i915: Enable DSI PLL for both DSI0 and DSI1 in case of dual link
drm/i915: cck reg used for checking DSI Pll locked
drm/i915: MIPI Timings related changes for dual link
drm/i915: Update the DSI disable path to support dual link panel disabling
drm/i915: Update the DSI enable path to support dual
drm/i915: Use DSI Pll1 for enabling MIPI DSI on Port C
drm/i915: Enable MIPI PHY transparent latch for DSI Port C
drm/i915: Software workaround for getting the HW status of DSI Port C on BYT
drm/i915: Changes related to the sequence port no for
Gustavo Padovan (3):
drm: add helper to get crtc timings (v5)
drm/i915: remove intel_crtc_cursor_set_obj() (v5)
drm/i915: remove intel_pipe_set_base() (v4)
Imre Deak (1):
drm/i915: fix use after free during eDP encoder destroying
Jani Nikula (3):
drm/i915/dsi: clean up MIPI DSI pipe vs. port usage
drm/i915/dsi: add ports to intel_dsi to describe the ports being driven
drm/i915: release struct_mutex on the i915_gem_init_hw fail path
John Harrison (23):
drm/i915: Ensure OLS & PLR are always in sync
drm/i915: Add reference count to request structure
drm/i915: Add helper functions to aid seqno -> request transition
drm/i915: Replace last_[rwf]_seqno with last_[rwf]_req
drm/i915: Convert i915_gem_ring_throttle to use requests
drm/i915: Ensure requests stick around during waits
drm/i915: Remove 'outstanding_lazy_seqno'
drm/i915: Make 'i915_gem_check_olr' actually check by request not seqno
drm/i915: Convert 'last_flip_req' to be a request not a seqno
drm/i915: Convert mmio_flip::seqno to struct request
drm/i915: Convert __wait_seqno() to __wait_request()
drm/i915: Remove obsolete seqno parameter from 'i915_add_request'
drm/i915: Convert 'flip_queued_seqno' into 'flip_queued_request'
drm/i915: Convert trace functions from seqno to request
drm/i915: Convert 'ring_idle()' to use requests not seqnos
drm/i915: Connect requests to rings at creation not submission
drm/i915: Convert 'i915_seqno_passed' calls into 'i915_gem_request_completed'
drm/i915: Remove the now redundant 'obj->ring'
drm/i915: Convert 'trace_irq' to use requests rather than seqnos
drm/i915: Fix up seqno -> request merge issues
drm/i915: Zero fill the request structure
drm/i915: Add unique id to the request structure for debugging
drm/i915: Additional request structure tracing
Jordan Justen (1):
drm/i915: Add GPGPU_THREADS_DISPATCHED to the register whitelist
Matt Roper (8):
drm/i915: Introduce intel_prepare_cursor_plane() (v2)
drm/i915: Make intel_plane_state subclass drm_plane_state
drm/i915: Consolidate plane 'prepare' functions (v2)
drm/i915: Consolidate plane 'cleanup' operations (v3)
drm/i915: Consolidate top-level .update_plane() handlers
drm/i915: Ensure state->crtc is non-NULL for plane updates
drm/i915: Make all plane disables use 'update_plane' (v5)
drm/i915: Hold runtime PM during plane commit
Michael H. Nguyen (1):
drm/i915: Add MI_SET_APPID cmd to cmd parser tables
Michel Thierry (4):
drm/i915/bdw: Add WaHdcDisableFetchWhenMasked
drm/i915/bdw: Add WaForceEnableNonCoherent label
drm/i915: Use true PPGTT in Gen8+ when execlists are enabled
drm/i915: Warn about missing context state workarounds only once
Mika Kuoppala (1):
drm/i915: Convert pxvid to extvid lookup table to a function
Rickard Strandqvist (1):
gpu: drm: i915: intel_display.c: Remove unused function
Rob Clark (1):
drm/i915: tame the chattermouth (v2)
Rodrigo Vivi (17):
drm/i915: Parse VBT PSR block.
drm/i915: HSW/BDW PSR Set idle_frames = VBT + 1
drm/i915: PSR get full link off x standby from VBT
drm/i915: remove PSR BDW single frame update.
drm/i915: Remove intel_psr_is_enabled function.
drm/i915: Add PSR registers for PSR VLV/CHV.
drm/i915: PSR VLV/CHV: Introduce setup, enable and disable functions
drm/i915: VLV/CHV PSR Software timer mode
drm/i915: VLV/CHV PSR debugfs.
drm/i915: Enable PSR for Baytrail and Braswell.
drm/i915: Move FBC stuff to intel_fbc.c
drm/i915: Introduce FBC DocBook.
drm/i915: Organize Fence registers for future enablement.
drm/i915: Organize PPGTT init
drm/i915: Organize PDP regs report for future.
drm/i915: Organize INSTDONE report for future.
drm/i915: Organize bind_vma funcs
Sonika Jindal (2):
drm/i915/skl: Correctly updating sprite wm parameter
drm/i915/skl: Correcting the flushing of pipe
Thomas Daniel (2):
drm/i915: Fix startup failure in LRC mode after recent init changes
drm/i915/bdw: Enable execlists by default where supported
Tvrtko Ursulin (3):
drm/i915: Stop putting GGTT VMA at the head of the list
drm/i915: Infrastructure for supporting different GGTT views per object
drm/i915: Documentation for multiple GGTT views
Ville Syrjälä (7):
drm/i915: Deal with video overlay on GPU reset
drm/i915: s/MI_STORE_DWORD_IMM_GEN8/MI_STORE_DWORD_IMM_GEN4/
drm/i915: Engage the DP scramble reset for pipe C on CHV
drm/i915: Fix CRC support for DP port D on CHV
drm/i915: Protect pipe_crc->entries update
drm/i915: Allocate the pipe_crc->entires with kcalloc()
drm/i915: Make i915_pipe_crc_read() oops proof
Documentation/DocBook/drm.tmpl | 15 +
drivers/gpu/drm/drm_crtc.c | 32 +-
drivers/gpu/drm/drm_modes.c | 26 +-
drivers/gpu/drm/i915/Makefile | 2 +
drivers/gpu/drm/i915/i915_cmd_parser.c | 131 +++-
drivers/gpu/drm/i915/i915_debugfs.c | 232 +++++--
drivers/gpu/drm/i915/i915_dma.c | 12 +-
drivers/gpu/drm/i915/i915_drv.c | 9 +-
drivers/gpu/drm/i915/i915_drv.h | 255 +++++++-
drivers/gpu/drm/i915/i915_gem.c | 535 +++++++--------
drivers/gpu/drm/i915/i915_gem_batch_pool.c | 137 ++++
drivers/gpu/drm/i915/i915_gem_context.c | 43 +-
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 117 +++-
drivers/gpu/drm/i915/i915_gem_gtt.c | 170 +++--
drivers/gpu/drm/i915/i915_gem_gtt.h | 35 +-
drivers/gpu/drm/i915/i915_gem_render_state.c | 2 +-
drivers/gpu/drm/i915/i915_gem_tiling.c | 2 +-
drivers/gpu/drm/i915/i915_gpu_error.c | 91 +--
drivers/gpu/drm/i915/i915_irq.c | 30 +-
drivers/gpu/drm/i915/i915_params.c | 9 +-
drivers/gpu/drm/i915/i915_reg.h | 378 ++++++-----
drivers/gpu/drm/i915/i915_suspend.c | 2 +-
drivers/gpu/drm/i915/i915_trace.h | 69 +-
drivers/gpu/drm/i915/intel_bios.c | 65 ++
drivers/gpu/drm/i915/intel_bios.h | 36 +-
drivers/gpu/drm/i915/intel_ddi.c | 25 +-
drivers/gpu/drm/i915/intel_display.c | 895 ++++++++++++--------------
drivers/gpu/drm/i915/intel_dp.c | 21 +-
drivers/gpu/drm/i915/intel_drv.h | 36 +-
drivers/gpu/drm/i915/intel_dsi.c | 483 ++++++++------
drivers/gpu/drm/i915/intel_dsi.h | 26 +
drivers/gpu/drm/i915/intel_dsi_cmd.c | 141 ++--
drivers/gpu/drm/i915/intel_dsi_cmd.h | 46 +-
drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 58 +-
drivers/gpu/drm/i915/intel_dsi_pll.c | 12 +-
drivers/gpu/drm/i915/intel_fbc.c | 701 ++++++++++++++++++++
drivers/gpu/drm/i915/intel_lrc.c | 178 ++---
drivers/gpu/drm/i915/intel_lrc.h | 2 +-
drivers/gpu/drm/i915/intel_overlay.c | 44 +-
drivers/gpu/drm/i915/intel_pm.c | 817 +----------------------
drivers/gpu/drm/i915/intel_psr.c | 246 +++++--
drivers/gpu/drm/i915/intel_renderstate_gen6.c | 25 +
drivers/gpu/drm/i915/intel_renderstate_gen7.c | 25 +
drivers/gpu/drm/i915/intel_renderstate_gen8.c | 25 +
drivers/gpu/drm/i915/intel_renderstate_gen9.c | 25 +
drivers/gpu/drm/i915/intel_ringbuffer.c | 226 ++++---
drivers/gpu/drm/i915/intel_ringbuffer.h | 23 +-
drivers/gpu/drm/i915/intel_runtime_pm.c | 4 +-
drivers/gpu/drm/i915/intel_sprite.c | 183 +-----
drivers/gpu/drm/i915/intel_uncore.c | 15 +-
include/drm/drm_crtc.h | 2 +
include/drm/drm_modes.h | 3 +
52 files changed, 3898 insertions(+), 2824 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_gem_batch_pool.c
create mode 100644 drivers/gpu/drm/i915/intel_fbc.c
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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