[Intel-gfx] [PATCH] drm/i915: Improve HiZ throughput on Cherryview.

shuang.he at intel.com shuang.he at intel.com
Sun Jan 11 17:58:23 PST 2015


Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he at intel.com)
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                                  354/354              354/354
ILK                                  201/201              201/201
SNB              +2-2              401/424              401/424
IVB                                  488/488              488/488
BYT                                  278/278              278/278
HSW                 -1              529/529              528/529
BDW                 -1              405/405              404/405
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
*SNB  igt_kms_flip_event_leak      NSPT(3, M35)      PASS(1, M35)
 SNB  igt_kms_flip_flip-vs-dpms-off-vs-modeset-interruptible      NSPT(1, M35)PASS(2, M35)      PASS(1, M35)
*SNB  igt_kms_flip_tiling_flip-changes-tiling      PASS(2, M35)      TIMEOUT(1, M35)
*SNB  igt_gem_concurrent_blit_gtt-rcs-early-read-interruptible      PASS(3, M35)      DMESG_WARN(1, M35)
 HSW  igt_kms_flip_dpms-vs-vblank-race      DMESG_WARN(2, M40)PASS(1, M20)      DMESG_WARN(1, M40)
*BDW  igt_gem_concurrent_blit_gtt-bcs-gpu-read-after-write-interruptible      PASS(2, M30)      DMESG_WARN(1, M30)
Note: You need to pay more attention to line start with '*'


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