[Intel-gfx] [PATCH 0/7] drm/i915: Disable hpd for disabled eDP ports

Sean V Kelley seanvk at posteo.de
Mon Jan 12 16:46:12 PST 2015


-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1



On 01/09/2015 04:21 AM, ville.syrjala at linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> My BSW has a nasty problem where it generates tons of spurious hpd
> interrupts when the eDP display is disabled. The best solution
> seems to be to disable hpd for eDP ports when the port is disabled
> since we don't care about long hpds anyway and short hpds are only
> relevant while the link is up and running.
> 

How did these spurious interrupts affect your system?  Did you see
this on both B and C Stepping?

Sean



> This series tries to implement that, and I've included a few
> random fixes/refactorings to the hpd code as well.
> 
> Ville Syrjälä (7): drm/i915: Make hpd arrays big enough to avoid
> out of bounds access drm/i915: Remove I915_HAS_HOTPLUG() check from
> i915_hpd_irq_setup() drm/i915: Don't register HDMI connectors for
> eDP ports on VLV/CHV drm/i915: Don't pretend SDVO hotplug works on
> 915 drm/i915: Set intel_connector->polled to DRM_CONNECTOR_POLL_HPD
> when appropriate drm/i915: Unify hpd setup between init and hpd
> storm handling drm/i915: Disable HPD for disabled eDP ports
> 
> drivers/gpu/drm/i915/i915_irq.c      | 172
> ++++++++++++++++++++--------------- 
> drivers/gpu/drm/i915/intel_crt.c     |   4 +- 
> drivers/gpu/drm/i915/intel_display.c |   6 +- 
> drivers/gpu/drm/i915/intel_dp.c      |  18 ++++ 
> drivers/gpu/drm/i915/intel_dp_mst.c  |   2 + 
> drivers/gpu/drm/i915/intel_drv.h     |   3 + 
> drivers/gpu/drm/i915/intel_hdmi.c    |   2 + 
> drivers/gpu/drm/i915/intel_sdvo.c    |   4 + 8 files changed, 136
> insertions(+), 75 deletions(-)
> 
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1

iQIcBAEBAgAGBQJUtGrNAAoJEGScDsMo8QYOmWsQAMORWtlFc8743+LrJ6y6+rX0
+uF3u/v6F+nQr7ijDqMAGuLfCHc04MFJl+uFzCI4p6/DoGTtL9s98EjLlLq/epGI
GuRimDfAx/VsYz18JIByXTbslduoXjq5Cf2C+6atN+AJ3zFEx+j9CRuDcniFVioJ
wufpSdp+p3ruLSSIj/s2IiaiveKUZ2mROxIoiJsfBeS0vvbNCVh87JlQQCJ21xlZ
L6kGGQq7n7lTa6uIxUo9JoU00yRvB3WsPxlSI8K8aDiYIiYxG+ovchUNCj7s0+IE
ePBdYPaZpA4i6/i8HPqXlPveAq8Y4rA2TX6dICd5SRok8PAz7lVVKoMSwS59BMX7
rq9dSFTPkgbU5iwATcmIqQ1plvFAwDpixJ/xpQWjAwm+JF85mW/1GEoPfpImERAY
3CQvi8fkmdVhkcwOQ0SXRMzkIzVjROVkG5PABwgDw4LSFzdP84x07RHCH6omSRIa
NH8fO3cLYWGRmgc1UtP5rW5gBx6J/c+AMtjz74ePoaQOv7H6WaNWEnRnebyXqFo5
RT3Gk0QLS79FFBApZKm2XsWa7Qj6XTKDKPShQME/5kUF5a6yl/arkYyfRVmiNcPg
LWWjS6zUAXm0NjwB24pMuAtugIAGp8D13bWxFQ2501cwDxXHNUK7i9ppdl08A2A7
agVTLHHrEhf8LxXS9AWv
=1UId
-----END PGP SIGNATURE-----


More information about the Intel-gfx mailing list