[Intel-gfx] [PATCH 8/9] drm/i915: PSR: respect vbt time for link trains when available.

[R, Durgadoss]

>-----Original Message-----
>From: Intel-gfx [mailto:intel-gfx-bounces at lists.freedesktop.org] On Behalf Of Rodrigo Vivi
>Sent: Monday, January 12, 2015 11:45 PM
>To: intel-gfx at lists.freedesktop.org
>Cc: Vivi, Rodrigo
>Subject: [Intel-gfx] [PATCH 8/9] drm/i915: PSR: respect vbt time for link trains when available.
>
>If link is off we need to give enough time for source to do link train.
>This time is usually set at VBT.
>
>VBT tp time comse in multiple of hundreds.

s/comes/comes

>
>Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
>---
> drivers/gpu/drm/i915/intel_psr.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
>index 313347a..d1c2c31 100644
>--- a/drivers/gpu/drm/i915/intel_psr.c
>+++ b/drivers/gpu/drm/i915/intel_psr.c
>@@ -603,6 +603,10 @@ void intel_psr_flush(struct drm_device *dev,
> 	struct drm_i915_private *dev_priv = dev->dev_private;
> 	struct drm_crtc *crtc;
> 	enum pipe pipe;
>+	bool link_on = dev_priv->psr.link_standby;
>+	int tp = 100 * dev_priv->vbt.psr.tp2_tp3_wakeup_time +
>+		 100 * dev_priv->vbt.psr.tp1_wakeup_time;
>+	int delay = tp && !link_on ? tp : 100;

May be we should WARN/DRM_ERR on link_on is false but still tp is 0 ?

With this, for patches 8-9,

Reviewed-by: Durgadoss R <durgadoss.r at intel.com>

Thanks,
Durga

>
> 	mutex_lock(&dev_priv->psr.lock);
> 	if (!dev_priv->psr.enabled) {
>@@ -635,7 +639,7 @@ void intel_psr_flush(struct drm_device *dev,
>
> 	if (!dev_priv->psr.active && !dev_priv->psr.busy_frontbuffer_bits)
> 		schedule_delayed_work(&dev_priv->psr.work,
>-				      msecs_to_jiffies(100));
>+				      msecs_to_jiffies(delay));
> 	mutex_unlock(&dev_priv->psr.lock);
> }
>
>--
>2.1.0
>
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