[Intel-gfx] [PATCH] drm/i915: Performed deferred clflush inside set-cache-level

[Chris Wilson]

On Wed, Jan 14, 2015 at 08:46:09PM +0100, Daniel Vetter wrote:
> > + if (obj->cache_dirty &&
> > +    obj->base.write_domain != I915_GEM_DOMAIN_CPU &&
> > +    cpu_write_needs_clflush(obj) &&
> > +    i915_gem_clflush_object(obj, true))
> 
> Imo hiding the actual action in the if condition like this is a bit too
> evil.

Split it out into 2 ifs:

if (cache_dirty && !not-in-cpu-cache && needs_clflush)
   if (i915_gem_clflush_object(obj, true))
       i915_gem_chipset_flush();

Moving the chipset_flush around can tidy this up (at the expense of some
brain power to only do the flush when required).

> Also, can we please have a testcase to at lest exercise the
> codepath? It sounds like a real functional tests using crc is a bit more
> work, but just poking at the WARN_ON would be good already.

Testcase: igt/gem_mmap_wc/set-cache-level
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre