[Intel-gfx] [PATCH 7/10] drm/i915: Enable eDP DRRS for CHV

[Rodrigo Vivi]

On Fri, Jan 9, 2015 at 12:56 PM, Vandana Kannan
<vandana.kannan at intel.com> wrote:
> From: Durgadoss R <durgadoss.r at intel.com>
>
> This patch enables eDP DRRS for CHV by adding the
> required IS_CHERRYVIEW() checks.
> CHV uses the same register bit as VLV.
>
> [Vandana]: Since CHV has 2 sets of M_N registers, it will follow the same code
> path as gen < 8. Added CHV check in dp_set_m_n()
>
> Signed-off-by: Durgadoss R <durgadoss.r at intel.com>
> Signed-off-by: Vandana Kannan <vandana.kannan at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 4 ++--
>  drivers/gpu/drm/i915/intel_dp.c      | 2 +-
>  2 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 25596ca..bb44fb9 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5810,8 +5810,8 @@ void intel_cpu_transcoder_set_m_n(struct intel_crtc *crtc,
>                  * for gen < 8) and if DRRS is supported (to make sure the
>                  * registers are not unnecessarily accessed).
>                  */
> -               if (m2_n2 && INTEL_INFO(dev)->gen < 8 &&
> -                       crtc->config.has_drrs) {
> +               if (m2_n2 && (IS_CHERRYVIEW(dev) || INTEL_INFO(dev)->gen < 8)
> +                       && crtc->config.has_drrs) {

This change here doesn't seem safe. As I told on previous comment I'd
prefer changing intel_dp_set_m_n instead of re-using this intel_cpu
one...

>                         I915_WRITE(PIPE_DATA_M2(transcoder),
>                                         TU_SIZE(m2_n2->tu) | m2_n2->gmch_m);
>                         I915_WRITE(PIPE_DATA_N2(transcoder), m2_n2->gmch_n);
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 3362d93..42195fe 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -4802,7 +4802,7 @@ static void intel_dp_set_drrs_state(struct drm_device *dev, int refresh_rate)
>                 return;
>         }
>
> -       if (INTEL_INFO(dev)->gen >= 8) {
> +       if (INTEL_INFO(dev)->gen >= 8 && !IS_CHERRYVIEW(dev)) {
>                 switch(index) {
>                 case DRRS_HIGH_RR:
>                         intel_dp_set_m_n(intel_crtc);
> --
> 2.0.1
>
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-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br