[Intel-gfx] [PATCH 2/7] drm/i915: Change VLV GEN6_RP_DOWN_TIMEOUT value to decimal

[Deepak S]

On Monday 19 January 2015 05:20 PM, ville.syrjala at linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> We use decimal for all the other RP magic values, so change
> GEN6_RP_DOWN_TIMEOUT to decimal as well. Also change the order
> of the register writes to match the BIOS spec for easier verification.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
>   drivers/gpu/drm/i915/intel_pm.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index e7f0f21..ee9a5f9 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4807,13 +4807,13 @@ static void valleyview_enable_rps(struct drm_device *dev)
>   	/*  Disable RC states. */
>   	I915_WRITE(GEN6_RC_CONTROL, 0);
>   
> +	I915_WRITE(GEN6_RP_DOWN_TIMEOUT, 1000000);
>   	I915_WRITE(GEN6_RP_UP_THRESHOLD, 59400);
>   	I915_WRITE(GEN6_RP_DOWN_THRESHOLD, 245000);
>   	I915_WRITE(GEN6_RP_UP_EI, 66000);
>   	I915_WRITE(GEN6_RP_DOWN_EI, 350000);
>   
>   	I915_WRITE(GEN6_RP_IDLE_HYSTERSIS, 10);
> -	I915_WRITE(GEN6_RP_DOWN_TIMEOUT, 0xf4240);
>   
>   	I915_WRITE(GEN6_RP_CONTROL,
>   		   GEN6_RP_MEDIA_TURBO |

:)
Reviewed-by: Deepak S<deepak.s at intel.com>