[Intel-gfx] [PATCH] drm/i915: Remove open-coded callers of flush_cpu_write_domain

[Daniel Vetter]

It checks the cpu domain and through the indirection with
cpu_write_needs_clflush obj->pin_display and whether cpu access in
general is coherent. And then flushes both cpu caches and the chipset
cache. Which is what flush_cpu_write_domain does.

Only difference is that on top we get a tracepoint, frontbuffer
tracking and and domain tracking updates. Which doesn't matter since
this is a paths are slowpaths.

So lets go with more shared code for clearer idioms.

v2: Drop the hunk in the pwrite function since it's totally bogus.
Spotted by Ville. Also explain better why this is safe, requested by
Chris.

Cc: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter at intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 783d1040bf83..b943a3f21911 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3825,12 +3825,8 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
 		vma->node.color = cache_level;
 	obj->cache_level = cache_level;
 
-	if (obj->cache_dirty &&
-	    obj->base.write_domain != I915_GEM_DOMAIN_CPU &&
-	    cpu_write_needs_clflush(obj)) {
-		if (i915_gem_clflush_object(obj, true))
-			i915_gem_chipset_flush(obj->base.dev);
-	}
+	if (obj->cache_dirty)
+		i915_gem_object_flush_cpu_write_domain(obj);
 
 	return 0;
 }
-- 
2.1.4