[Intel-gfx] [RFC PATCH 10/12] drm/i915/dsi: remove old read/write functions in favor of new stuff
Shobhit Kumar
shobhit.kumar at linux.intel.com
Fri Jan 23 04:25:01 PST 2015
On 01/16/2015 05:57 PM, Jani Nikula wrote:
> All of these are replaced by the drm core mipi dsi functions.
>
> Signed-off-by: Jani Nikula <jani.nikula at intel.com>
Reviewed-By: Shobhit Kumar <shobhit.kumar at intel.com>
> ---
> drivers/gpu/drm/i915/intel_dsi_cmd.c | 259 -----------------------------------
> drivers/gpu/drm/i915/intel_dsi_cmd.h | 72 ----------
> 2 files changed, 331 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi_cmd.c b/drivers/gpu/drm/i915/intel_dsi_cmd.c
> index 17b892a365ee..6baaa374fc89 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_cmd.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_cmd.c
> @@ -96,11 +96,6 @@ static void print_stat(struct intel_dsi *intel_dsi, enum port port)
> #undef STAT_BIT
> }
>
> -enum dsi_type {
> - DSI_DCS,
> - DSI_GENERIC,
> -};
> -
> /* enable or disable command mode hs transmissions */
> void dsi_hs_mode_enable(struct intel_dsi *intel_dsi, bool enable,
> enum port port)
> @@ -121,260 +116,6 @@ void dsi_hs_mode_enable(struct intel_dsi *intel_dsi, bool enable,
> intel_dsi->hs = enable;
> }
>
> -static int dsi_vc_send_short(struct intel_dsi *intel_dsi, int channel,
> - u8 data_type, u16 data, enum port port)
> -{
> - struct drm_encoder *encoder = &intel_dsi->base.base;
> - struct drm_device *dev = encoder->dev;
> - struct drm_i915_private *dev_priv = dev->dev_private;
> - u32 ctrl_reg;
> - u32 ctrl;
> - u32 mask;
> -
> - DRM_DEBUG_KMS("channel %d, data_type %d, data %04x\n",
> - channel, data_type, data);
> -
> - if (intel_dsi->hs) {
> - ctrl_reg = MIPI_HS_GEN_CTRL(port);
> - mask = HS_CTRL_FIFO_FULL;
> - } else {
> - ctrl_reg = MIPI_LP_GEN_CTRL(port);
> - mask = LP_CTRL_FIFO_FULL;
> - }
> -
> - if (wait_for((I915_READ(MIPI_GEN_FIFO_STAT(port)) & mask) == 0, 50)) {
> - DRM_ERROR("Timeout waiting for HS/LP CTRL FIFO !full\n");
> - print_stat(intel_dsi, port);
> - }
> -
> - /*
> - * Note: This function is also used for long packets, with length passed
> - * as data, since SHORT_PACKET_PARAM_SHIFT ==
> - * LONG_PACKET_WORD_COUNT_SHIFT.
> - */
> - ctrl = data << SHORT_PACKET_PARAM_SHIFT |
> - channel << VIRTUAL_CHANNEL_SHIFT |
> - data_type << DATA_TYPE_SHIFT;
> -
> - I915_WRITE(ctrl_reg, ctrl);
> -
> - return 0;
> -}
> -
> -static int dsi_vc_send_long(struct intel_dsi *intel_dsi, int channel,
> - u8 data_type, const u8 *data, int len, enum port port)
> -{
> - struct drm_encoder *encoder = &intel_dsi->base.base;
> - struct drm_device *dev = encoder->dev;
> - struct drm_i915_private *dev_priv = dev->dev_private;
> - u32 data_reg;
> - int i, j, n;
> - u32 mask;
> -
> - DRM_DEBUG_KMS("channel %d, data_type %d, len %04x\n",
> - channel, data_type, len);
> -
> - if (intel_dsi->hs) {
> - data_reg = MIPI_HS_GEN_DATA(port);
> - mask = HS_DATA_FIFO_FULL;
> - } else {
> - data_reg = MIPI_LP_GEN_DATA(port);
> - mask = LP_DATA_FIFO_FULL;
> - }
> -
> - if (wait_for((I915_READ(MIPI_GEN_FIFO_STAT(port)) & mask) == 0, 50))
> - DRM_ERROR("Timeout waiting for HS/LP DATA FIFO !full\n");
> -
> - for (i = 0; i < len; i += n) {
> - u32 val = 0;
> - n = min_t(int, len - i, 4);
> -
> - for (j = 0; j < n; j++)
> - val |= *data++ << 8 * j;
> -
> - I915_WRITE(data_reg, val);
> - /* XXX: check for data fifo full, once that is set, write 4
> - * dwords, then wait for not set, then continue. */
> - }
> -
> - return dsi_vc_send_short(intel_dsi, channel, data_type, len, port);
> -}
> -
> -static int dsi_vc_write_common(struct intel_dsi *intel_dsi,
> - int channel, const u8 *data, int len,
> - enum dsi_type type, enum port port)
> -{
> - int ret;
> -
> - if (len == 0) {
> - BUG_ON(type == DSI_GENERIC);
> - ret = dsi_vc_send_short(intel_dsi, channel,
> - MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM,
> - 0, port);
> - } else if (len == 1) {
> - ret = dsi_vc_send_short(intel_dsi, channel,
> - type == DSI_GENERIC ?
> - MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM :
> - MIPI_DSI_DCS_SHORT_WRITE, data[0],
> - port);
> - } else if (len == 2) {
> - ret = dsi_vc_send_short(intel_dsi, channel,
> - type == DSI_GENERIC ?
> - MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM :
> - MIPI_DSI_DCS_SHORT_WRITE_PARAM,
> - (data[1] << 8) | data[0], port);
> - } else {
> - ret = dsi_vc_send_long(intel_dsi, channel,
> - type == DSI_GENERIC ?
> - MIPI_DSI_GENERIC_LONG_WRITE :
> - MIPI_DSI_DCS_LONG_WRITE, data, len,
> - port);
> - }
> -
> - return ret;
> -}
> -
> -int dsi_vc_dcs_write(struct intel_dsi *intel_dsi, int channel,
> - const u8 *data, int len, enum port port)
> -{
> - return dsi_vc_write_common(intel_dsi, channel, data, len, DSI_DCS,
> - port);
> -}
> -
> -int dsi_vc_generic_write(struct intel_dsi *intel_dsi, int channel,
> - const u8 *data, int len, enum port port)
> -{
> - return dsi_vc_write_common(intel_dsi, channel, data, len, DSI_GENERIC,
> - port);
> -}
> -
> -static int dsi_vc_dcs_send_read_request(struct intel_dsi *intel_dsi,
> - int channel, u8 dcs_cmd, enum port port)
> -{
> - return dsi_vc_send_short(intel_dsi, channel, MIPI_DSI_DCS_READ,
> - dcs_cmd, port);
> -}
> -
> -static int dsi_vc_generic_send_read_request(struct intel_dsi *intel_dsi,
> - int channel, u8 *reqdata,
> - int reqlen, enum port port)
> -{
> - u16 data;
> - u8 data_type;
> -
> - switch (reqlen) {
> - case 0:
> - data_type = MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM;
> - data = 0;
> - break;
> - case 1:
> - data_type = MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM;
> - data = reqdata[0];
> - break;
> - case 2:
> - data_type = MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM;
> - data = (reqdata[1] << 8) | reqdata[0];
> - break;
> - default:
> - BUG();
> - }
> -
> - return dsi_vc_send_short(intel_dsi, channel, data_type, data, port);
> -}
> -
> -static int dsi_read_data_return(struct intel_dsi *intel_dsi,
> - u8 *buf, int buflen, enum port port)
> -{
> - struct drm_encoder *encoder = &intel_dsi->base.base;
> - struct drm_device *dev = encoder->dev;
> - struct drm_i915_private *dev_priv = dev->dev_private;
> - int i, len = 0;
> - u32 data_reg, val;
> -
> - if (intel_dsi->hs) {
> - data_reg = MIPI_HS_GEN_DATA(port);
> - } else {
> - data_reg = MIPI_LP_GEN_DATA(port);
> - }
> -
> - while (len < buflen) {
> - val = I915_READ(data_reg);
> - for (i = 0; i < 4 && len < buflen; i++, len++)
> - buf[len] = val >> 8 * i;
> - }
> -
> - return len;
> -}
> -
> -int dsi_vc_dcs_read(struct intel_dsi *intel_dsi, int channel, u8 dcs_cmd,
> - u8 *buf, int buflen, enum port port)
> -{
> - struct drm_encoder *encoder = &intel_dsi->base.base;
> - struct drm_device *dev = encoder->dev;
> - struct drm_i915_private *dev_priv = dev->dev_private;
> - u32 mask;
> - int ret;
> -
> - /*
> - * XXX: should issue multiple read requests and reads if request is
> - * longer than MIPI_MAX_RETURN_PKT_SIZE
> - */
> -
> - I915_WRITE(MIPI_INTR_STAT(port), GEN_READ_DATA_AVAIL);
> -
> - ret = dsi_vc_dcs_send_read_request(intel_dsi, channel, dcs_cmd, port);
> - if (ret)
> - return ret;
> -
> - mask = GEN_READ_DATA_AVAIL;
> - if (wait_for((I915_READ(MIPI_INTR_STAT(port)) & mask) == mask, 50))
> - DRM_ERROR("Timeout waiting for read data.\n");
> -
> - ret = dsi_read_data_return(intel_dsi, buf, buflen, port);
> - if (ret < 0)
> - return ret;
> -
> - if (ret != buflen)
> - return -EIO;
> -
> - return 0;
> -}
> -
> -int dsi_vc_generic_read(struct intel_dsi *intel_dsi, int channel,
> - u8 *reqdata, int reqlen, u8 *buf, int buflen, enum port port)
> -{
> - struct drm_encoder *encoder = &intel_dsi->base.base;
> - struct drm_device *dev = encoder->dev;
> - struct drm_i915_private *dev_priv = dev->dev_private;
> - u32 mask;
> - int ret;
> -
> - /*
> - * XXX: should issue multiple read requests and reads if request is
> - * longer than MIPI_MAX_RETURN_PKT_SIZE
> - */
> -
> - I915_WRITE(MIPI_INTR_STAT(port), GEN_READ_DATA_AVAIL);
> -
> - ret = dsi_vc_generic_send_read_request(intel_dsi, channel, reqdata,
> - reqlen, port);
> - if (ret)
> - return ret;
> -
> - mask = GEN_READ_DATA_AVAIL;
> - if (wait_for((I915_READ(MIPI_INTR_STAT(port)) & mask) == mask, 50))
> - DRM_ERROR("Timeout waiting for read data.\n");
> -
> - ret = dsi_read_data_return(intel_dsi, buf, buflen, port);
> - if (ret < 0)
> - return ret;
> -
> - if (ret != buflen)
> - return -EIO;
> -
> - return 0;
> -}
> -
> /*
> * send a video mode command
> *
> diff --git a/drivers/gpu/drm/i915/intel_dsi_cmd.h b/drivers/gpu/drm/i915/intel_dsi_cmd.h
> index 70f24666a1f9..9a28ff58a92b 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_cmd.h
> +++ b/drivers/gpu/drm/i915/intel_dsi_cmd.h
> @@ -39,78 +39,6 @@
> void dsi_hs_mode_enable(struct intel_dsi *intel_dsi, bool enable,
> enum port port);
>
> -int dsi_vc_dcs_write(struct intel_dsi *intel_dsi, int channel,
> - const u8 *data, int len, enum port port);
> -
> -int dsi_vc_generic_write(struct intel_dsi *intel_dsi, int channel,
> - const u8 *data, int len, enum port port);
> -
> -int dsi_vc_dcs_read(struct intel_dsi *intel_dsi, int channel, u8 dcs_cmd,
> - u8 *buf, int buflen, enum port port);
> -
> -int dsi_vc_generic_read(struct intel_dsi *intel_dsi, int channel,
> - u8 *reqdata, int reqlen, u8 *buf, int buflen, enum port port);
> -
> int dpi_send_cmd(struct intel_dsi *intel_dsi, u32 cmd, bool hs, enum port port);
>
> -/* XXX: questionable write helpers */
> -static inline int dsi_vc_dcs_write_0(struct intel_dsi *intel_dsi,
> - int channel, u8 dcs_cmd, enum port port)
> -{
> - return dsi_vc_dcs_write(intel_dsi, channel, &dcs_cmd, 1, port);
> -}
> -
> -static inline int dsi_vc_dcs_write_1(struct intel_dsi *intel_dsi,
> - int channel, u8 dcs_cmd, u8 param, enum port port)
> -{
> - u8 buf[2] = { dcs_cmd, param };
> - return dsi_vc_dcs_write(intel_dsi, channel, buf, 2, port);
> -}
> -
> -static inline int dsi_vc_generic_write_0(struct intel_dsi *intel_dsi,
> - int channel, enum port port)
> -{
> - return dsi_vc_generic_write(intel_dsi, channel, NULL, 0, port);
> -}
> -
> -static inline int dsi_vc_generic_write_1(struct intel_dsi *intel_dsi,
> - int channel, u8 param, enum port port)
> -{
> - return dsi_vc_generic_write(intel_dsi, channel, ¶m, 1, port);
> -}
> -
> -static inline int dsi_vc_generic_write_2(struct intel_dsi *intel_dsi,
> - int channel, u8 param1, u8 param2, enum port port)
> -{
> - u8 buf[2] = { param1, param2 };
> - return dsi_vc_generic_write(intel_dsi, channel, buf, 2, port);
> -}
> -
> -/* XXX: questionable read helpers */
> -static inline int dsi_vc_generic_read_0(struct intel_dsi *intel_dsi,
> - int channel, u8 *buf, int buflen, enum port port)
> -{
> - return dsi_vc_generic_read(intel_dsi, channel, NULL, 0, buf, buflen,
> - port);
> -}
> -
> -static inline int dsi_vc_generic_read_1(struct intel_dsi *intel_dsi,
> - int channel, u8 param, u8 *buf,
> - int buflen, enum port port)
> -{
> - return dsi_vc_generic_read(intel_dsi, channel, ¶m, 1, buf, buflen,
> - port);
> -}
> -
> -static inline int dsi_vc_generic_read_2(struct intel_dsi *intel_dsi,
> - int channel, u8 param1, u8 param2,
> - u8 *buf, int buflen, enum port port)
> -{
> - u8 req[2] = { param1, param2 };
> -
> - return dsi_vc_generic_read(intel_dsi, channel, req, 2, buf, buflen,
> - port);
> -}
> -
> -
> #endif /* _INTEL_DSI_DSI_H */
>
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