[Intel-gfx] [PATCH] drm/mm: Support 4 GiB and larger ranges

[Thomas Hellstrom]

On 01/27/2015 09:15 AM, Thierry Reding wrote:
> On Tue, Jan 27, 2015 at 07:07:44AM +0100, Thomas Hellstrom wrote:
>> On 01/26/2015 11:51 PM, Dave Airlie wrote:
>>> On 23 January 2015 at 18:05, Thierry Reding
<thierry.reding at gmail.com> wrote:
>>>> From: Thierry Reding <treding at nvidia.com>
>>>>
>>>> The current implementation is limited by the number of addresses that
>>>> fit into an unsigned long. This causes problems on 32-bit Tegra where
>>>> unsigned long is 32-bit but drm_mm is used to manage an IOVA space of
>>>> 4 GiB. Given the 32-bit limitation, the range is limited to 4 GiB - 1
>>>> (or 4 GiB - 4 KiB for page granularity).
>>>>
>>>> This commit changes the start and size of the range to be an unsigned
>>>> 64-bit integer, thus allowing much larger ranges to be supported.
>>> This seems fine to me, Chris, Daniel or Thomas, any objections?
>>>
>>> Dave.
>>
>> This is perfectly fine with me, although I'm a bit curious why the
>> allocation granularity of the IOVA space needs to be 1 byte?
>
> Are you referring to the 4 GiB - 1 comment? The point I was trying to
> make is not that the granularity of the IOVA space needs to be 1 byte
> but rather that using an unsigned long for a size on a 32-bit machine
> will give you 4 GiB - 1 addresses. The IOMMU page size is still 4 KiB
> for Tegra.

I was rather referring to that if the range manager (drm_mm) is set up
to manage pages instead of bytes
(like, for example, the TTM VM address space), you'd get 4G - 1 pages,
which, I believe, is sufficient on most 32 bit systems?

Thanks,

/Thomas


>
> Thierry