[Intel-gfx] [PATCH 3/3] drm/i915/skl: Remove the check enforcing VCS2 to be gen8 only

shuang.he at intel.com shuang.he at intel.com
Sat Jan 31 09:17:43 PST 2015


Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he at intel.com)
Task id: 5682
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                                  353/353              353/353
ILK                                  353/353              353/353
SNB                                  400/422              400/422
IVB              +1-2              485/487              484/487
BYT                                  296/296              296/296
HSW              +1-1              507/508              507/508
BDW                 -2              401/402              399/402
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
*IVB  igt_gem_evict_everything_minor-normal      PASS(2, M34)      DMESG_WARN(1, M34)
 IVB  igt_gem_storedw_batches_loop_normal      DMESG_WARN(5, M34M4)PASS(15, M34M4M21)      PASS(1, M34)
 IVB  igt_gem_storedw_batches_loop_secure-dispatch      DMESG_WARN(1, M34)PASS(6, M34M4)      DMESG_WARN(1, M34)
 HSW  igt_gem_pwrite_pread_snooped-pwrite-blt-cpu_mmap-performance      DMESG_WARN(1, M40)PASS(18, M40M20)      PASS(1, M20)
 HSW  igt_gem_storedw_loop_vebox      DMESG_WARN(2, M20)PASS(3, M40M20)      DMESG_WARN(1, M20)
 BDW  igt_gem_pwrite_pread_display-pwrite-blt-gtt_mmap-performance      DMESG_WARN(4, M28)PASS(2, M30)      DMESG_WARN(1, M28)
*BDW  igt_gem_pwrite_pread_uncached-pwrite-blt-gtt_mmap-performance      PASS(6, M30M28)      DMESG_WARN(1, M28)
Note: You need to pay more attention to line start with '*'


More information about the Intel-gfx mailing list