[Intel-gfx] [PATCH] drm/i915: apply the PCI_D0/D3 hibernation workaround everywhere on pre GEN6

[Jani Nikula]

On Tue, 30 Jun 2015, Pavel Machek <pavel at ucw.cz> wrote:
> Hi!
>
>> commit da2bc1b9db3351addd293e5b82757efe1f77ed1d
>> Author: Imre Deak <imre.deak at intel.com>
>> Date:   Thu Oct 23 19:23:26 2014 +0300
>> 
>>     drm/i915: add poweroff_late handler
>> 
>> introduced a regression on old platforms during hibernation. A workaround was
>> added in
>> 
>> commit ab3be73fa7b43f4c3648ce29b5fd649ea54d3adb
>> Author: Imre Deak <imre.deak at intel.com>
>> Date:   Mon Mar 2 13:04:41 2015 +0200
>> 
>>     drm/i915: gen4: work around hang during hibernation
>> 
>> using an explicit blacklist for the GENs/BIOS vendors where the issue was
>> reported. Later there we had reports of the same failure on platforms not on
>> this list.
>> 
>> To my best knowledge the correct thing to do is still to put the device to PCI
>> D3 state during hibernation, see [1] and [2] for the reasons. This
>> also aligns
>
> Hmm, so the reasons according to you are:
>
>> - ACPI mandates that the OSPM (the kernel in our case) puts all
>>   devices
>>   into D3 that are not wake-up sources (i915 is not) (Kudos to Ville
>>   for
>>   pointing this out)
>
> Clearly, BIOS vendors did not read this, and pretty clearly Windows
> do not follow the specs, either. That means that it is bad idea for us
> to follow the specs, and trigger BIOS bugs. 
>
>> - Embedded panels have a well defined shutdown sequence. We don't
>>   have
>>   any good reason to not follow this, in fact for some panels the
>>   subsequent reinitialization could be problematic in case of a hard
>>   power-off. (Thanks to Jani for this info)
>
> Please cite concrete example. I have yet to see machine that would not
> power up on forced power down. In fact, I argue that such machine
> would be very broken, and that such machine does not exist. While we
> have these real machines broken:

I was originally referring to reboots, which might not be applicable
here. Anyway, we have to go out of our way to handle that properly in
some cases:

commit 01527b3127997ef6370d5ad4fa25d96847fbf12a
Author: Clint Taylor <clinton.a.taylor at intel.com>
Date:   Mon Jul 7 13:01:46 2014 -0700

    drm/i915/vlv: T12 eDP panel timing enforcement during reboot

BR,
Jani.

>
>> +	 * Lenovo Thinkpad X301, X61s, X60, T60, X41
>> +	 * Fujitsu FSC S7110
>> +	 * Acer Aspire 1830T
>
> What makes you think that BIOS writers will do something different for
> Gen6+ hardware? X301 is not that old.
> 									Pavel
> -- 
> (english) http://www.livejournal.com/~pavelmachek
> (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

-- 
Jani Nikula, Intel Open Source Technology Center