[Intel-gfx] [PATCH 8/9] drm/i915: Check pixel clock when setting mode for TV

[Mika Kahola]

It is possible the we request to have a mode that has
higher pixel clock than our HW can support. This patch
checks if requested pixel clock is lower than the one
supported by the HW. The requested mode is discarded
if we cannot support the requested pixel clock.

This patch applies to TV.

Signed-off-by: Mika Kahola <mika.kahola at intel.com>
---
 drivers/gpu/drm/i915/intel_tv.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 8b9d325..076c1c1 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -891,12 +891,33 @@ intel_tv_mode_find(struct intel_tv *intel_tv)
 	return intel_tv_mode_lookup(intel_tv->tv_format);
 }
 
+static int
+intel_tv_max_pixclk(struct intel_tv *intel_tv)
+{
+	struct drm_device *dev = intel_tv->base.base.dev;
+	struct drm_i915_private *dev_priv = to_i915(dev);
+	struct intel_crtc *intel_crtc = to_intel_crtc(intel_tv->base.base.crtc);
+
+	if (IS_CHERRYVIEW(dev))
+		return  DIV_ROUND_UP(dev_priv->max_cdclk_freq * 100, 95);
+	else if (IS_VALLEYVIEW(dev))
+		return  DIV_ROUND_UP(dev_priv->max_cdclk_freq * 100, 90);
+	else if (IS_BROADWELL(dev) && intel_crtc->config->ips_enabled)
+		return  DIV_ROUND_UP(dev_priv->max_cdclk_freq * 100, 95);
+	else
+		return dev_priv->max_cdclk_freq;
+}
+
 static enum drm_mode_status
 intel_tv_mode_valid(struct drm_connector *connector,
 		    struct drm_display_mode *mode)
 {
 	struct intel_tv *intel_tv = intel_attached_tv(connector);
 	const struct tv_mode *tv_mode = intel_tv_mode_find(intel_tv);
+	int max_pixclk = intel_tv_max_pixclk(intel_tv);
+
+	if (mode->clock > max_pixclk)
+		return MODE_CLOCK_HIGH;
 
 	/* Ensure TV refresh is close to desired refresh */
 	if (tv_mode && abs(tv_mode->refresh - drm_mode_vrefresh(mode) * 1000)
-- 
1.9.1