[Intel-gfx] [PATCH 9/9] drm/i915: Check pixel clock when setting mode for DP-MST
shuang.he at intel.com
shuang.he at intel.com
Sat Jul 4 16:24:30 PDT 2015
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he at intel.com)
Task id: 6717
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
ILK 302/302 302/302
SNB 312/316 312/316
IVB 343/343 343/343
BYT -3 287/287 284/287
HSW 380/380 380/380
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
*BYT igt at gem_partial_pwrite_pread@reads PASS(1) FAIL(1)
*BYT igt at gem_partial_pwrite_pread@reads-uncached PASS(1) FAIL(1)
*BYT igt at gem_tiled_partial_pwrite_pread@reads PASS(1) FAIL(1)
Note: You need to pay more attention to line start with '*'
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