[Intel-gfx] [PATCH] [RFC] drm/i915: Handle HPD when it has actually occurred
Daniel Vetter
daniel at ffwll.ch
Mon Jul 6 01:36:18 PDT 2015
On Mon, Jul 06, 2015 at 11:23:53AM +0530, Sonika Jindal wrote:
> Writing to PCH_PORT_HOTPLUG for each interrupt is not required.
> Handle it only if hpd has actually occurred like we handle other
> interrupts.
>
> Signed-off-by: Sonika Jindal <sonika.jindal at intel.com>
> ---
> Hi,
>
> I see we don't check for hotplug_trigger before processing the HPD for any of the platform. Is there any reason for this?
> For SKL, if I let write to PCH_PORT_HOTPLUG happen for all interrupts, somehow this register gets an invalid value at one point and it zeroes it out.
> If I put this check before handling HPD, hotplug behaves fine.
> Please let me know if you see any issue with this approach.
Nice find, this sounds really intrigueing, at least for cpt/ibx platforms.
I'm not sure whether what will happen with atom/i9xx platforms though
since the irq bits are different there. But at least bxt has a FIXME
comment that suggest we do need to save the sticky bits on those platforms
too.
If we can fix this up for all platforms then I think a subsequent patch
could try to re-enable the hpd checks in the hdmi ->detect function and
make use spec compliant. Then after maybe 1-2 kernel releases of testing
we'll know whether it really works.
But I'd really want to enable this everywhere just to have maximal test
coverage - we did have reports on all platforms so it seems a generic
issue.
Thanks, Daniel
>
> Thanks,
> Sonika
>
> drivers/gpu/drm/i915/i915_irq.c | 11 ++++++-----
> 1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index a6fbe64..2d47372 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1760,11 +1760,12 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
> u32 dig_hotplug_reg;
> u32 pin_mask, long_mask;
>
> - dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
> - I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
> -
> - pch_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger, dig_hotplug_reg, hpd_cpt);
> - intel_hpd_irq_handler(dev, pin_mask, long_mask);
> + if (hotplug_trigger) {
> + dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
> + I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
> + pch_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger, dig_hotplug_reg, hpd_cpt);
> + intel_hpd_irq_handler(dev, pin_mask, long_mask);
> + }
>
> if (pch_iir & SDE_AUDIO_POWER_MASK_CPT) {
> int port = ffs((pch_iir & SDE_AUDIO_POWER_MASK_CPT) >>
> --
> 1.7.10.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
More information about the Intel-gfx
mailing list