[Intel-gfx] [PATCH] drm/i915: RMW register cycles considered evil

[Paulo Zanoni]

2015-07-06 12:04 GMT-03:00 Daniel Vetter <daniel at ffwll.ch>:
> On Mon, Jul 06, 2015 at 03:50:49PM +0300, Ville Syrjälä wrote:
>> On Mon, Jul 06, 2015 at 02:42:02PM +0200, Daniel Vetter wrote:
>> > Especially for workarounds which is stuff that's almost impossible to
>> > verify: The initial state from the firmware on boot-up and after
>> > resume could be different, which will hide bugs when we do an RMW
>> > cycle.
>>
>> If you're really worried about that then we should then explicitly
>> initialize all the registers that might affect stuff.
>>
>> For a bunch of GT registers we could just do a GPU reset at driver
>> init. That that won't help with UCGCTL and such.
>>
>> I'm also worried that if we don't use RMWs for early parts, the hardware
>> folks may still change the default for some ofhte other bits, and then
>> we end up clobbering those.
>
> The point is that we'll at least consistently clobber them, which is the
> important part. Chasing a bug which only happens when you freshly boot but
> not after the first gpu reset (or first resume or the other way round or
> whatever) is not fun at all.

I think there are possibly other ways to be consistent. We could, for
example, save the values which we think are correct at boot - even if
we rely on the BIOS - and then (optionally) check them at every resume
or runtime resume. Maybe there are even other ideas for that.

But I do see the value in what you're doing, even though I'm also
afraid of the possible bugs brought by it, and I like the idea of
starting this with new gens only. If you decide to keep this strategy,
can you please print on debugfs when the RMW value is different from
the non-RMW value?

>
> If that means we will botch the context a bit then I guess we need better
> tooling to compare the actual hw state with what Bspec suggest, including
> all the w/a.
> -Daniel
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
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-- 
Paulo Zanoni