[Intel-gfx] [PATCH] drm/i915: Improve DP downstream HPD handling

shuang.he at intel.com shuang.he at intel.com
Tue Jul 7 04:23:07 PDT 2015


Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he at intel.com)
Task id: 6728
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
ILK                 -1              302/302              301/302
SNB                                  312/316              312/316
IVB                                  345/345              345/345
BYT                 -1              289/289              288/289
HSW                                  382/382              382/382
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
*ILK  igt at kms_flip@flip-vs-rmfb-interruptible      PASS(1)      DMESG_WARN(1)
(dmesg patch applied)drm:intel_pch_fifo_underrun_irq_handler[i915]]*ERROR*PCH_transcoder_A_FIFO_underrun at PCH transcoder A FIFO underrun
*BYT  igt at gem_partial_pwrite_pread@reads-uncached      PASS(1)      FAIL(1)
Note: You need to pay more attention to line start with '*'


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