[Intel-gfx] [PATCH 01/12] drm/i915: use correct power domain for csr loading

[Animesh Manna]

On 7/10/2015 1:34 AM, Daniel Vetter wrote:
> Grabbing a runtime pm reference with intel_runtime_pm_get will only
> prevent device D3. But dmc firmware is required even earlier (namely
> for the skl power well 2).
>
> Hence we need to grab a rpm reference higher up in the hierarchy. For
> simplicity just grab the _INIT display power well. That's a bit too
> much, but since the firmware loading task should completely fairly
> quickly this won't be a real problem really.
>
> Cc: Animesh Manna <animesh.manna at intel.com>
> Signed-off-by: Daniel Vetter <daniel.vetter at intel.com>
> ---
>   drivers/gpu/drm/i915/intel_csr.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
> index 6d8a7bf06dfc..16cd9dae1c1b 100644
> --- a/drivers/gpu/drm/i915/intel_csr.c
> +++ b/drivers/gpu/drm/i915/intel_csr.c
> @@ -392,7 +392,7 @@ static void finish_csr_load(const struct firmware *fw, void *context)
>   	DRM_DEBUG_KMS("Finished loading %s\n", dev_priv->csr.fw_path);
>   out:
>   	if (fw_loaded)
> -		intel_runtime_pm_put(dev_priv);
> +		intel_display_power_put(dev_priv, POWER_DOMAIN_INIT);
>   	else
>   		intel_csr_load_status_set(dev_priv, FW_FAILED);
>   
> @@ -429,7 +429,7 @@ void intel_csr_ucode_init(struct drm_device *dev)
>   	 * Obtain a runtime pm reference, until CSR is loaded,
>   	 * to avoid entering runtime-suspend.
>   	 */
> -	intel_runtime_pm_get(dev_priv);
> +	intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);

Thanks Daniel for helping me in redesigning the dmc firmware loading flow.
I can see a issue here - intel_power_domain_init is called after intel_csr_ucode_init in i915_driver_load function, we can move the init call for csr after power domain init.

>   
>   	/* CSR supported for platform, load firmware */
>   	ret = request_firmware_nowait(THIS_MODULE, true, csr->fw_path,