[Intel-gfx] [PATCH v3 4/4] drm/i915/gen9: Add WaSetDisablePixMaskCammingAndRhwoInCommonSliceChicken

[Mika Kuoppala]

Arun Siluvery <arun.siluvery at linux.intel.com> writes:

> In Indirect context w/a batch buffer,
> +WaSetDisablePixMaskCammingAndRhwoInCommonSliceChicken
>
> v2: SKL revision id was used for BXT, copy paste error found during
> internal review (Bob Beckett).
>
> v3: explain why part of the WA is in Per ctx batch (Mika)
>
> Cc: Mika Kuoppala <mika.kuoppala at intel.com>
> Cc: Imre Deak <imre.deak at intel.com>
> Signed-off-by: Arun Siluvery <arun.siluvery at linux.intel.com>


Patches 3/4 and 4/4,
Reviewed-by: Mika Kuoppala <mika.kuoppala at intel.com>

> ---
>  drivers/gpu/drm/i915/intel_lrc.c        | 10 ++++++++++
>  drivers/gpu/drm/i915/intel_ringbuffer.c |  7 +++++--
>  2 files changed, 15 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index ebe8eb1..8e2fd2e 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1292,6 +1292,16 @@ static int gen9_init_perctx_bb(struct intel_engine_cs *ring,
>  	struct drm_device *dev = ring->dev;
>  	uint32_t index = wa_ctx_start(wa_ctx, *offset, CACHELINE_DWORDS);
>  
> +	/* WaSetDisablePixMaskCammingAndRhwoInCommonSliceChicken:skl,bxt */
> +	if ((IS_SKYLAKE(dev) && (INTEL_REVID(dev) <= SKL_REVID_B0)) ||
> +	    (IS_BROXTON(dev) && (INTEL_REVID(dev) == BXT_REVID_A0))) {
> +		wa_ctx_emit(batch, index, MI_LOAD_REGISTER_IMM(1));
> +		wa_ctx_emit(batch, index, GEN9_SLICE_COMMON_ECO_CHICKEN0);
> +		wa_ctx_emit(batch, index,
> +			    _MASKED_BIT_ENABLE(DISABLE_PIXEL_MASK_CAMMING));
> +		wa_ctx_emit(batch, index, MI_NOOP);
> +	}
> +
>  	/* WaDisableCtxRestoreArbitration:skl,bxt */
>  	if ((IS_SKYLAKE(dev) && (INTEL_REVID(dev) <= SKL_REVID_D0)) ||
>  	    (IS_BROXTON(dev) && (INTEL_REVID(dev) == BXT_REVID_A0)))
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 385859e..177f7ed 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -946,8 +946,11 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
>  		/* WaSetDisablePixMaskCammingAndRhwoInCommonSliceChicken:skl,bxt */
>  		WA_SET_BIT_MASKED(GEN7_COMMON_SLICE_CHICKEN1,
>  				  GEN9_RHWO_OPTIMIZATION_DISABLE);
> -		WA_SET_BIT_MASKED(GEN9_SLICE_COMMON_ECO_CHICKEN0,
> -				  DISABLE_PIXEL_MASK_CAMMING);
> +		/*
> +		 * WA also requires GEN9_SLICE_COMMON_ECO_CHICKEN0[14:14] to be set
> +		 * but we do that in per ctx batchbuffer as there is an issue
> +		 * with this register not getting restored on ctx restore
> +		 */
>  	}
>  
>  	if ((IS_SKYLAKE(dev) && INTEL_REVID(dev) >= SKL_REVID_C0) ||
> -- 
> 1.9.1
>
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