[Intel-gfx] [PATCH] drm/i915: Update HAS_PSR macro to include all gen>=8 platforms
Daniel Vetter
daniel at ffwll.ch
Tue Jul 21 02:47:52 PDT 2015
On Tue, Jul 21, 2015 at 10:31:19AM +0100, Damien Lespiau wrote:
> On Tue, Jul 21, 2015 at 02:48:31PM +0530, Sonika Jindal wrote:
> > This is to get PSR support for bxt.
> >
> > Signed-off-by: Sonika Jindal <sonika.jindal at intel.com>
>
> Maybe with a drm/i915/bxt prefix:
>
> Reviewed-by: Damien Lespiau <damien.lespiau at intel.com>
Is this actually tested? Can we maybe enable psr by default (Rodrigo seems
so close ...)?
-Daniel
>
> --
> Damien
>
> > ---
> > drivers/gpu/drm/i915/i915_drv.h | 5 ++---
> > 1 file changed, 2 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 718170c..54d2729 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -2537,9 +2537,8 @@ struct drm_i915_cmd_table {
> >
> > #define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi)
> > #define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg)
> > -#define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev) || \
> > - IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev) || \
> > - IS_SKYLAKE(dev))
> > +#define HAS_PSR(dev) (IS_HASWELL(dev) || IS_VALLEYVIEW(dev) || \
> > + INTEL_INFO(dev)->gen >= 8)
> > #define HAS_RUNTIME_PM(dev) (IS_GEN6(dev) || IS_HASWELL(dev) || \
> > IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \
> > IS_SKYLAKE(dev))
> > --
> > 1.7.10.4
> >
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--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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