[Intel-gfx] [PATCH v2 00/11] Check pixel clock when setting mode

[Mika Kahola]

>From EDID we can read and request higher pixel clock than
our HW can support. This set of patches add checks if
requested pixel clock is lower than the one supported by the HW.
The requested mode is discarded if we cannot support the requested
pixel clock. For example for Cherryview

'cvt 2560 1600 60' gives

# 2560x1600 59.99 Hz (CVT 4.10MA) hsync: 99.46 kHz; pclk: 348.50 MHz
Modeline "2560x1600_60.00"  348.50  2560 2760 3032 3504  1600 1603 1609 1658 -hsync +vsync

where pixel clock 348.50 MHz is higher than the supported 304 MHz.

The checks are implemented for DisplayPort, HDMI, LVDS, DVO, SDVO, DSI,
CRT, TV, and DP-MST.

V2:
- The maximum DOT clock frequency is added to debugfs i915_frequency_info.
- max dotclock cached in dev_priv structure
- moved computation of max dotclock to 'intel_display.c'

Mika Kahola (11):
  drm/i915: Store max dotclock
  drm/i915: DisplayPort pixel clock check
  drm/i915: HDMI pixel clock check
  drm/i915: LVDS pixel clock check
  drm/i915: SDVO pixel clock check
  drm/i915: DSI pixel clock check
  drm/i915: CRT pixel clock check
  drm/i915: TV pixel clock check
  drm/i915: DisplayPort-MST pixel clock check
  drm/i915: DVO pixel clock check
  drm/i915: Max DOT clock frequency to debugfs

 drivers/gpu/drm/i915/i915_debugfs.c  |  2 ++
 drivers/gpu/drm/i915/i915_drv.h      |  1 +
 drivers/gpu/drm/i915/intel_crt.c     |  7 ++++++-
 drivers/gpu/drm/i915/intel_display.c | 20 ++++++++++++++++++++
 drivers/gpu/drm/i915/intel_dp.c      |  6 +++++-
 drivers/gpu/drm/i915/intel_dp_mst.c  | 12 ++++++++++++
 drivers/gpu/drm/i915/intel_dsi.c     |  8 ++++++++
 drivers/gpu/drm/i915/intel_dvo.c     |  5 +++++
 drivers/gpu/drm/i915/intel_hdmi.c    |  9 ++++++++-
 drivers/gpu/drm/i915/intel_lvds.c    |  4 ++++
 drivers/gpu/drm/i915/intel_sdvo.c    |  6 ++++++
 drivers/gpu/drm/i915/intel_tv.c      |  6 ++++++
 12 files changed, 83 insertions(+), 3 deletions(-)

-- 
1.9.1