[Intel-gfx] [PATCH v5 6/8] drm/i915: Add IS_BDW_ULX

Mika Kahola mika.kahola at intel.com
Tue Jun 2 00:21:04 PDT 2015


From: Ville Syrjälä <ville.syrjala at linux.intel.com>

We need to tell BDW ULT and ULX apart.

Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

v2: Rebased to the latest
v3: Rebased to the latest

Signed-off-by: Mika Kahola <mika.kahola at intel.com>

Author:    Ville Syrjälä <ville.syrjala at linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index db9e268..46722f8 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2399,6 +2399,9 @@ struct drm_i915_cmd_table {
 				 ((INTEL_DEVID(dev) & 0xf) == 0x6 ||	\
 				 (INTEL_DEVID(dev) & 0xf) == 0xb ||	\
 				 (INTEL_DEVID(dev) & 0xf) == 0xe))
+/* ULX machines are also considered ULT. */
+#define IS_BDW_ULX(dev)		(IS_BROADWELL(dev) && \
+				 (INTEL_DEVID(dev) & 0xf) == 0xe)
 #define IS_BDW_GT3(dev)		(IS_BROADWELL(dev) && \
 				 (INTEL_DEVID(dev) & 0x00F0) == 0x0020)
 #define IS_HSW_ULT(dev)		(IS_HASWELL(dev) && \
-- 
1.9.1



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