[Intel-gfx] [PATCH 03/24] drm/i915: clean up intel_sanitize_crtc
Matt Roper
matthew.d.roper at intel.com
Tue Jun 2 18:27:31 PDT 2015
On Mon, Jun 01, 2015 at 03:27:06PM +0200, Maarten Lankhorst wrote:
> Apply force if needed.
It's not clear to me what this means; can you elaborate? It seems that
'force' in the context of intel_crtc_control() means we're updating the
'enable' field as well, not just the 'active' field.
> During boot pipe_config->active will be false.
> On resume no separate modeset is needed when the state gets restored
> with the sw state anyway.
If I understand the git history correctly, there's also a special case
where intel_modeset_setup_hw_state() gets called on lid status change
because some BIOS silently change hardware state behind our back. Are
we still covered in that case?
Matt
>
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 8 ++--
> drivers/gpu/drm/i915/intel_display.c | 84 +++++++++++-------------------------
> drivers/gpu/drm/i915/intel_drv.h | 2 +-
> 3 files changed, 29 insertions(+), 65 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 51fe0fbcd00c..db23916c1875 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -3637,7 +3637,7 @@ static void hsw_trans_edp_pipe_A_crc_wa(struct drm_device *dev)
> bool active = pipe_config->base.active;
>
> if (active) {
> - intel_crtc_control(&crtc->base, false);
> + intel_crtc_control(&crtc->base, false, false);
> pipe_config = to_intel_crtc_state(crtc->base.state);
> }
>
> @@ -3647,7 +3647,7 @@ static void hsw_trans_edp_pipe_A_crc_wa(struct drm_device *dev)
> POWER_DOMAIN_PIPE_PANEL_FITTER(PIPE_A));
>
> if (active)
> - intel_crtc_control(&crtc->base, true);
> + intel_crtc_control(&crtc->base, true, false);
> }
> drm_modeset_unlock_all(dev);
> }
> @@ -3671,7 +3671,7 @@ static void hsw_undo_trans_edp_pipe_A_crc_wa(struct drm_device *dev)
> bool active = pipe_config->base.active;
>
> if (active) {
> - intel_crtc_control(&crtc->base, false);
> + intel_crtc_control(&crtc->base, false, false);
> pipe_config = to_intel_crtc_state(crtc->base.state);
> }
>
> @@ -3681,7 +3681,7 @@ static void hsw_undo_trans_edp_pipe_A_crc_wa(struct drm_device *dev)
> POWER_DOMAIN_PIPE_PANEL_FITTER(PIPE_A));
>
> if (active)
> - intel_crtc_control(&crtc->base, true);
> + intel_crtc_control(&crtc->base, true, false);
> }
> drm_modeset_unlock_all(dev);
> }
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 0f031658a297..8e9afc55c284 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -6192,7 +6192,7 @@ free:
> }
>
> /* Master function to enable/disable CRTC and corresponding power wells */
> -int intel_crtc_control(struct drm_crtc *crtc, bool enable)
> +int intel_crtc_control(struct drm_crtc *crtc, bool active, bool force)
> {
> struct drm_device *dev = crtc->dev;
> struct drm_mode_config *config = &dev->mode_config;
> @@ -6202,10 +6202,13 @@ int intel_crtc_control(struct drm_crtc *crtc, bool enable)
> struct drm_atomic_state *state;
> int ret;
>
> - if (enable == intel_crtc->active)
> + if (WARN_ON(active && force))
> + return -EINVAL;
> +
> + if (active == intel_crtc->active)
> return 0;
>
> - if (enable && !crtc->state->enable)
> + if (active && !crtc->state->enable)
> return 0;
>
> /* this function should be called with drm_modeset_lock_all for now */
> @@ -6225,7 +6228,9 @@ int intel_crtc_control(struct drm_crtc *crtc, bool enable)
> ret = PTR_ERR(pipe_config);
> goto err;
> }
> - pipe_config->base.active = enable;
> + pipe_config->base.active = active;
> + if (force)
> + pipe_config->base.enable = false;
>
> ret = intel_set_mode(state);
> if (!ret)
> @@ -6249,7 +6254,7 @@ void intel_crtc_update_dpms(struct drm_crtc *crtc)
> for_each_encoder_on_crtc(dev, crtc, intel_encoder)
> enable |= intel_encoder->connectors_active;
>
> - intel_crtc_control(crtc, enable);
> + intel_crtc_control(crtc, enable, false);
> }
>
> void intel_encoder_destroy(struct drm_encoder *encoder)
> @@ -14812,11 +14817,14 @@ intel_check_plane_mapping(struct intel_crtc *crtc)
> return true;
> }
>
> -static void intel_sanitize_crtc(struct intel_crtc *crtc)
> +static void intel_sanitize_crtc(struct intel_crtc *crtc,
> + struct intel_crtc_state *pipe_config)
> {
> struct drm_device *dev = crtc->base.dev;
> struct drm_i915_private *dev_priv = dev->dev_private;
> + struct intel_encoder *intel_encoder;
> u32 reg;
> + bool enable;
>
> /* Clear any frame start delays used for debugging left by the BIOS */
> reg = PIPECONF(crtc->config->cpu_transcoder);
> @@ -14833,7 +14841,6 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc)
> * disable the crtc (and hence change the state) if it is wrong. Note
> * that gen4+ has a fixed plane -> pipe mapping. */
> if (INTEL_INFO(dev)->gen < 4 && !intel_check_plane_mapping(crtc)) {
> - struct intel_connector *connector;
> bool plane;
>
> DRM_DEBUG_KMS("[CRTC:%d] wrong plane connection detected!\n",
> @@ -14846,33 +14853,12 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc)
> to_intel_plane_state(crtc->base.primary->state)->visible = true;
> crtc->base.primary->crtc = &crtc->base;
> crtc->plane = !plane;
> - intel_crtc_control(&crtc->base, false);
> + intel_crtc_control(&crtc->base, false, true);
> crtc->plane = plane;
> -
> - /* ... and break all links. */
> - for_each_intel_connector(dev, connector) {
> - if (connector->encoder->base.crtc != &crtc->base)
> - continue;
> -
> - connector->base.dpms = DRM_MODE_DPMS_OFF;
> - connector->base.encoder = NULL;
> - }
> - /* multiple connectors may have the same encoder:
> - * handle them and break crtc link separately */
> - for_each_intel_connector(dev, connector)
> - if (connector->encoder->base.crtc == &crtc->base) {
> - connector->encoder->base.crtc = NULL;
> - connector->encoder->connectors_active = false;
> - }
> -
> - WARN_ON(crtc->active);
> - crtc->base.state->enable = false;
> - crtc->base.state->active = false;
> - crtc->base.enabled = false;
> }
>
> if (dev_priv->quirks & QUIRK_PIPEA_FORCE &&
> - crtc->pipe == PIPE_A && !crtc->active) {
> + crtc->pipe == PIPE_A && (!pipe_config || !pipe_config->base.active)) {
> /* BIOS forgot to enable pipe A, this mostly happens after
> * resume. Force-enable the pipe to fix this, the update_dpms
> * call below we restore the pipe to the right state, but leave
> @@ -14881,36 +14867,13 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc)
> }
>
> /* Adjust the state of the output pipe according to whether we
> - * have active connectors/encoders. */
> - intel_crtc_update_dpms(&crtc->base);
> -
> - if (crtc->active != crtc->base.state->active) {
> - struct intel_encoder *encoder;
> + * have active connectors/encoders */
> + enable = false;
> + for_each_encoder_on_crtc(dev, &crtc->base, intel_encoder)
> + enable |= intel_encoder->connectors_active;
>
> - /* This can happen either due to bugs in the get_hw_state
> - * functions or because the pipe is force-enabled due to the
> - * pipe A quirk. */
> - DRM_DEBUG_KMS("[CRTC:%d] hw state adjusted, was %s, now %s\n",
> - crtc->base.base.id,
> - crtc->base.state->enable ? "enabled" : "disabled",
> - crtc->active ? "enabled" : "disabled");
> -
> - crtc->base.state->enable = crtc->active;
> - crtc->base.state->active = crtc->active;
> - crtc->base.enabled = crtc->active;
> -
> - /* Because we only establish the connector -> encoder ->
> - * crtc links if something is active, this means the
> - * crtc is now deactivated. Break the links. connector
> - * -> encoder links are only establish when things are
> - * actually up, hence no need to break them. */
> - WARN_ON(crtc->active);
> -
> - for_each_encoder_on_crtc(dev, &crtc->base, encoder) {
> - WARN_ON(encoder->connectors_active);
> - encoder->base.crtc = NULL;
> - }
> - }
> + if (!enable && crtc->base.state->active && !pipe_config)
> + intel_crtc_control(&crtc->base, false, true);
>
> if (crtc->active || HAS_GMCH_DISPLAY(dev)) {
> /*
> @@ -15278,7 +15241,8 @@ void intel_modeset_setup_hw_state(struct drm_device *dev,
> &crtc->state->adjusted_mode);
> }
>
> - intel_sanitize_crtc(intel_crtc);
> + intel_sanitize_crtc(intel_crtc, !force_restore ? NULL :
> + to_intel_crtc_state(crtc_state));
>
> /*
> * sanitize_crtc may have forced an update of crtc->state,
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 807e001e4cee..ec721e31eae8 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -993,7 +993,7 @@ void intel_mark_busy(struct drm_device *dev);
> void intel_mark_idle(struct drm_device *dev);
> void intel_crtc_restore_mode(struct drm_crtc *crtc);
> int intel_display_suspend(struct drm_device *dev);
> -int intel_crtc_control(struct drm_crtc *crtc, bool enable);
> +int intel_crtc_control(struct drm_crtc *crtc, bool active, bool force);
> void intel_crtc_update_dpms(struct drm_crtc *crtc);
> void intel_encoder_destroy(struct drm_encoder *encoder);
> int intel_connector_init(struct intel_connector *);
> --
> 2.1.0
>
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--
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
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