[Intel-gfx] [PATCH] drm/i915/skl: Implement WaBarrierPerformanceFixDisable (again)

Jani Nikula jani.nikula at linux.intel.com
Wed Jun 3 01:35:01 PDT 2015


On Wed, 03 Jun 2015, Nick Hoath <nicholas.hoath at intel.com> wrote:
> On 03/06/2015 00:02, Widawsky, Benjamin wrote:
>
> Probably should have a line like:
> Problem introduced in:
> instead of just 'in'
>
>> in
>> commit 65ca7514e21adbee25b8175fc909759c735d00ff
>> Author: Damien Lespiau <damien.lespiau at intel.com>
>> Date:   Mon Feb 9 19:33:22 2015 +0000
>>
>>      drm/i915/skl: Implement WaBarrierPerformanceFixDisable
>>
>> The workaround ended up in the chv workarounds. Not sure what the reason or
>> history of that is, but it /seems/ wrong. Don't know if this fixes anything
>
> patch doesn't always get it right...
>
> Reviewed-by: Nick Hoath <nicholas.hoath at intel.com>

Already pushed Ville's patch
http://mid.gmane.org/1433248657-4509-1-git-send-email-ville.syrjala@linux.intel.com

BR,
Jani.

>
>> since I have many other problems with my platform.
>>
>> Cc: Damien Lespiau <damien.lespiau at intel.com>
>> Cc: Nick Hoath <nicholas.hoath at intel.com>
>> Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
>> ---
>>   drivers/gpu/drm/i915/intel_ringbuffer.c | 14 +++++++-------
>>   1 file changed, 7 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
>> index d934f85..0fd6033d 100644
>> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
>> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
>> @@ -901,13 +901,6 @@ static int chv_init_workarounds(struct intel_engine_cs *ring)
>>   			    GEN6_WIZ_HASHING_MASK,
>>   			    GEN6_WIZ_HASHING_16x4);
>>
>> -	if (INTEL_REVID(dev) == SKL_REVID_C0 ||
>> -	    INTEL_REVID(dev) == SKL_REVID_D0)
>> -		/* WaBarrierPerformanceFixDisable:skl */
>> -		WA_SET_BIT_MASKED(HDC_CHICKEN0,
>> -				  HDC_FENCE_DEST_SLM_DISABLE |
>> -				  HDC_BARRIER_PERFORMANCE_DISABLE);
>> -
>>   	return 0;
>>   }
>>
>> @@ -972,6 +965,13 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
>>   		tmp |= HDC_FORCE_CSR_NON_COHERENT_OVR_DISABLE;
>>   	WA_SET_BIT_MASKED(HDC_CHICKEN0, tmp);
>>
>> +	if (INTEL_REVID(dev) == SKL_REVID_C0 ||
>> +	    INTEL_REVID(dev) == SKL_REVID_D0)
>> +		/* WaBarrierPerformanceFixDisable:skl */
>> +		WA_SET_BIT_MASKED(HDC_CHICKEN0,
>> +				  HDC_FENCE_DEST_SLM_DISABLE |
>> +				  HDC_BARRIER_PERFORMANCE_DISABLE);
>> +
>>   	return 0;
>>   }
>>
>>
>
>
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-- 
Jani Nikula, Intel Open Source Technology Center


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