[Intel-gfx] [PATCH] drm/i915: Include G4X/VLV/CHV in self refresh status

[Jani Nikula]

On Tue, 02 Jun 2015, Ville Syrjälä <ville.syrjala at linux.intel.com> wrote:
> On Tue, Jun 02, 2015 at 02:17:47PM +0300, Ander Conselvan de Oliveira wrote:
>> Add all missing platforms handled by intel_set_memory_cxsr() to the
>> i915_sr_status debugfs entry.
>> 
>> v2: Add G4X too. (Ville)
>>     Clarify the change also affects CHV. (Ander)
>> 
>> References: https://bugs.freedesktop.org/show_bug.cgi?id=89792
>> Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira at intel.com>
>
> It's a good enough white lie for my taste. 
> Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Pushed to drm-intel-fixes, thanks for the patch and review.

BR,
Jani.

>
> I would also accept removing the entire file, but we can keep it if
> people find some use for it.
>
>> ---
>>  drivers/gpu/drm/i915/i915_debugfs.c | 5 ++++-
>>  1 file changed, 4 insertions(+), 1 deletion(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
>> index fece922..564a6ba 100644
>> --- a/drivers/gpu/drm/i915/i915_debugfs.c
>> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
>> @@ -1725,12 +1725,15 @@ static int i915_sr_status(struct seq_file *m, void *unused)
>>  
>>  	if (HAS_PCH_SPLIT(dev))
>>  		sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
>> -	else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
>> +	else if (IS_CRESTLINE(dev) || IS_G4X(dev) ||
>> +		 IS_I945G(dev) || IS_I945GM(dev))
>>  		sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
>>  	else if (IS_I915GM(dev))
>>  		sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
>>  	else if (IS_PINEVIEW(dev))
>>  		sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
>> +	else if (IS_VALLEYVIEW(dev))
>> +		sr_enabled = I915_READ(FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
>>  
>>  	intel_runtime_pm_put(dev_priv);
>>  
>> -- 
>> 2.1.0
>
> -- 
> Ville Syrjälä
> Intel OTC
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-- 
Jani Nikula, Intel Open Source Technology Center