[Intel-gfx] [PATCH 3/5] drm/i915/skl: Restrict the ring frequency table programming to SKL
Rodrigo Vivi
rodrigo.vivi at gmail.com
Tue Jun 9 16:30:39 PDT 2015
thanks
Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
On Sun, Jun 7, 2015 at 6:02 AM, <akash.goel at intel.com> wrote:
> From: Akash Goel <akash.goel at intel.com>
>
> Ring frequency table programming is not required on BXT. Added separate
> checks to enable the programming only for SKL & skip for BXT.
>
> Issue: VIZ-5144
> Signed-off-by: Akash Goel <akash.goel at intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 65938ea..657c0d8d 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4705,7 +4705,7 @@ void gen6_update_ring_freq(struct drm_device *dev)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
>
> - if (INTEL_INFO(dev)->gen < 6 || IS_VALLEYVIEW(dev))
> + if (INTEL_INFO(dev)->gen < 6 || IS_VALLEYVIEW(dev) || IS_BROXTON(dev))
> return;
>
> mutex_lock(&dev_priv->rps.hw_lock);
> @@ -5820,7 +5820,8 @@ static void intel_gen6_powersave_work(struct work_struct *work)
> } else if (INTEL_INFO(dev)->gen >= 9) {
> gen9_enable_rc6(dev);
> gen9_enable_rps(dev);
> - __gen6_update_ring_freq(dev);
> + if (IS_SKYLAKE(dev))
> + __gen6_update_ring_freq(dev);
> } else if (IS_BROADWELL(dev)) {
> gen8_enable_rps(dev);
> __gen6_update_ring_freq(dev);
> --
> 1.9.2
>
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--
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
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