[Intel-gfx] [PATCH v2] drm/i915: Limit CHV max cdclk

Mika Kahola mika.kahola at intel.com
Thu Jun 11 00:54:03 PDT 2015


Limit CHV maximum cdclk to 320MHz.

v2: Rebase to the latest

Signed-off-by: Mika Kahola <mika.kahola at intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c38c297..ab40d04 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5647,7 +5647,7 @@ static void intel_update_max_cdclk(struct drm_device *dev)
 		else
 			dev_priv->max_cdclk_freq = 675000;
 	} else if (IS_VALLEYVIEW(dev)) {
-		dev_priv->max_cdclk_freq = 400000;
+		dev_priv->max_cdclk_freq = IS_CHERRYVIEW(dev) ? 320000 : 400000;
 	} else {
 		/* otherwise assume cdclk is fixed */
 		dev_priv->max_cdclk_freq = dev_priv->cdclk_freq;
-- 
1.9.1



More information about the Intel-gfx mailing list