[Intel-gfx] [PATCH 1/4] drm/i915: print FBC compression status on debugfs

[Ville Syrjälä]

On Thu, Jun 11, 2015 at 04:02:24PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni at intel.com>
> 
> We already had a few bugs in the past where FBC was compressing
> nothing when it was enabled, which makes the feature quite useless.
> Add this information to debugfs so the test suites can check for
> regressions in this piece of the code.
> 
> Our igt/tests/kms_frontbuffer_tracking already has support for this
> message.
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 5 +++++
>  drivers/gpu/drm/i915/i915_reg.h     | 3 +++
>  2 files changed, 8 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 92cf273..7358f6d 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1638,6 +1638,11 @@ static int i915_fbc_status(struct seq_file *m, void *unused)
>  		seq_putc(m, '\n');
>  	}
>  
> +	if (INTEL_INFO(dev_priv)->gen >= 7 && !IS_VALLEYVIEW(dev_priv))

We already have HAS_FBC check in this function so the VLV check is
pointless.

> +		seq_printf(m, "Compressing: %s\n",
> +			   yesno(I915_READ(FBC_STATUS2) &
> +				 FBC_COMPRESSION_MASK));
> +
>  	intel_runtime_pm_put(dev_priv);
>  
>  	return 0;
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 40a3a64..0c0b12a 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1951,6 +1951,9 @@ enum skl_disp_power_wells {
>  #define FBC_FENCE_OFF		0x03218 /* BSpec typo has 321Bh */
>  #define FBC_TAG			0x03300
>  
> +#define FBC_STATUS2		0x43214
> +#define  FBC_COMPRESSION_MASK	0x7ff
> +
>  #define FBC_LL_SIZE		(1536)
>  
>  /* Framebuffer compression for GM45+ */
> -- 
> 2.1.4
> 
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-- 
Ville Syrjälä
Intel OTC