[Intel-gfx] [PATCH] drm/i915: drrs_invalidate at flip schedule
Ramalingam C
ramalingam.c at intel.com
Mon Jun 15 08:15:59 PDT 2015
Daniel,
Only now i am understanding your comment in previous mail that is "need
to upclock in both flush and validate".
Yup this change is what needed. Tested to be working fine.
The Documentation for the intel_edp_drrs_flush() mislead me to expect
invalidate call for each framebuffer change. I have just corrected this
documentation as part your change and sending it to you.
Thanks.
On Monday 15 June 2015 03:22 PM, Daniel Vetter wrote:
> On Thu, Jun 11, 2015 at 02:57:52PM +0530, Ramalingam C wrote:
>> Sorry for late response. I was away for longer.
>>
>> Daniel,
>>
>> As we have the intel_frontbuffer_flush, I have created the
>> intel_frontbuffer_invalidate.
>> This can be called from flip preparation notification to handle the
>> frontbuffer invalidation.
>> I will share the patches now.
> You need to fix up the broken DRRS code - the frontbuffer tracking code is
> perfectly fine. See below diff with inline comments.
>
> Cheers, Daniel
>
> And my Signed-off-by: Daniel Vetter <daniel.vetter at intel.com> in case the
> patch works as-is.
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index f73da99e66b8..b96a4abb7a98 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -5487,6 +5487,7 @@ void intel_edp_drrs_invalidate(struct drm_device *dev,
> crtc = dp_to_dig_port(dev_priv->drrs.dp)->base.base.crtc;
> pipe = to_intel_crtc(crtc)->pipe;
>
> + /* invalidate means busy screen hence upclock */
> if (dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR) {
> intel_dp_set_drrs_state(dev_priv->dev,
> dev_priv->drrs.dp->attached_connector->panel.
> @@ -5532,8 +5533,16 @@ void intel_edp_drrs_flush(struct drm_device *dev,
> pipe = to_intel_crtc(crtc)->pipe;
> dev_priv->drrs.busy_frontbuffer_bits &= ~frontbuffer_bits;
>
> - if (dev_priv->drrs.refresh_rate_type != DRRS_LOW_RR &&
> - !dev_priv->drrs.busy_frontbuffer_bits)
> + /* flush means busy screen hence upclock */
> + if (dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR) {
> + intel_dp_set_drrs_state(dev_priv->dev,
> + dev_priv->drrs.dp->attached_connector->panel.
> + fixed_mode->vrefresh);
> + }
> +
> + /* flush also means no more activity hence schedule downclock if all
> + * other fbs are quiescent too */
> + if (!dev_priv->drrs.busy_frontbuffer_bits)
> schedule_delayed_work(&dev_priv->drrs.work,
> msecs_to_jiffies(1000));
> mutex_unlock(&dev_priv->drrs.mutex);
--
Thanks,
--Ram
More information about the Intel-gfx
mailing list