[Intel-gfx] [PATCH 3/3] drm/i915: Unify modesetting for global pipes

Mika Kahola mika.kahola at intel.com
Tue Jun 16 04:31:35 PDT 2015


Combine global pipe modesetting for Valleyview,
Broxton, and Broadwell. This removes some of the
repetitive code that exists in routines
'valleyview_modeset_global_pipes()' and
'broadwell_modeset_global_pipes()'. The naming
changed to 'intel_modeset_global_pipes()'.

Signed-off-by: Mika Kahola <mika.kahola at intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 118 +++++++++++------------------------
 1 file changed, 38 insertions(+), 80 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index b178fe9..01e79a5 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5851,6 +5851,37 @@ static int valleyview_calc_cdclk(struct drm_i915_private *dev_priv,
 		return 200000;
 }
 
+static int broadwell_calc_cdclk(struct drm_i915_private *dev_priv,
+			      int max_pixel_rate)
+{
+	int cdclk;
+
+	/*
+	 * FIXME should also account for plane ratio
+	 * once 64bpp pixel formats are supported.
+	 */
+	if (max_pixel_rate > 540000)
+		cdclk = 675000;
+	else if (max_pixel_rate > 450000)
+		cdclk = 540000;
+	else if (max_pixel_rate > 337500)
+		cdclk = 450000;
+	else
+		cdclk = 337500;
+
+	/*
+	 * FIXME move the cdclk caclulation to
+	 * compute_config() so we can fail gracegully.
+	 */
+	if (cdclk > dev_priv->max_cdclk_freq) {
+		DRM_ERROR("requested cdclk (%d kHz) exceeds max (%d kHz)\n",
+			  cdclk, dev_priv->max_cdclk_freq);
+		cdclk = dev_priv->max_cdclk_freq;
+	}
+
+	return cdclk;
+}
+
 static int broxton_calc_cdclk(struct drm_i915_private *dev_priv,
 			      int max_pixclk)
 {
@@ -5908,7 +5939,7 @@ static int intel_mode_max_pixclk(struct drm_device *dev,
 	return max_pixclk;
 }
 
-static int valleyview_modeset_global_pipes(struct drm_atomic_state *state)
+static int intel_modeset_global_pipes(struct drm_atomic_state *state)
 {
 	struct drm_i915_private *dev_priv = to_i915(state->dev);
 	struct drm_crtc *crtc;
@@ -5921,8 +5952,12 @@ static int valleyview_modeset_global_pipes(struct drm_atomic_state *state)
 
 	if (IS_VALLEYVIEW(dev_priv))
 		cdclk = valleyview_calc_cdclk(dev_priv, max_pixclk);
-	else
+	else if (IS_BROXTON(dev_priv))
 		cdclk = broxton_calc_cdclk(dev_priv, max_pixclk);
+	else if (IS_BROADWELL(dev_priv))
+		cdclk = broadwell_calc_cdclk(dev_priv, max_pixclk);
+	else
+		cdclk = dev_priv->cdclk_freq;
 
 	if (cdclk == dev_priv->cdclk_freq)
 		return 0;
@@ -9628,80 +9663,6 @@ static void broadwell_set_cdclk(struct drm_device *dev, int cdclk)
 	     cdclk, dev_priv->cdclk_freq);
 }
 
-static int broadwell_calc_cdclk(struct drm_i915_private *dev_priv,
-			      int max_pixel_rate)
-{
-	int cdclk;
-
-	/*
-	 * FIXME should also account for plane ratio
-	 * once 64bpp pixel formats are supported.
-	 */
-	if (max_pixel_rate > 540000)
-		cdclk = 675000;
-	else if (max_pixel_rate > 450000)
-		cdclk = 540000;
-	else if (max_pixel_rate > 337500)
-		cdclk = 450000;
-	else
-		cdclk = 337500;
-
-	/*
-	 * FIXME move the cdclk caclulation to
-	 * compute_config() so we can fail gracegully.
-	 */
-	if (cdclk > dev_priv->max_cdclk_freq) {
-		DRM_ERROR("requested cdclk (%d kHz) exceeds max (%d kHz)\n",
-			  cdclk, dev_priv->max_cdclk_freq);
-		cdclk = dev_priv->max_cdclk_freq;
-	}
-
-	return cdclk;
-}
-
-static int broadwell_modeset_global_pipes(struct drm_atomic_state *state)
-{
-	struct drm_i915_private *dev_priv = to_i915(state->dev);
-	struct drm_crtc *crtc;
-	struct drm_crtc_state *crtc_state;
-	int max_pixclk = intel_mode_max_pixclk(state->dev, state);
-	int cdclk;
-	int ret = 0;
-
-	if (max_pixclk < 0)
-		return max_pixclk;
-
-	cdclk = broadwell_calc_cdclk(dev_priv, max_pixclk);
-
-	if (cdclk == dev_priv->cdclk_freq)
-		return 0;
-
-	/* add all active pipes to the state */
-	for_each_crtc(state->dev, crtc) {
-		if (!crtc->state->enable)
-			continue;
-
-		crtc_state = drm_atomic_get_crtc_state(state, crtc);
-		if (IS_ERR(crtc_state))
-			return PTR_ERR(crtc_state);
-
-		if (!crtc_state->active || needs_modeset(crtc_state))
-			continue;
-
-		crtc_state->mode_changed = true;
-
-		ret = drm_atomic_add_affected_connectors(state, crtc);
-		if (ret)
-			break;
-
-		ret = drm_atomic_add_affected_planes(state, crtc);
-		if (ret)
-			break;
-	}
-
-	return ret;
-}
-
 static void broadwell_modeset_global_resources(struct drm_atomic_state *state)
 {
 	struct drm_device *dev = state->dev;
@@ -12922,10 +12883,7 @@ static int intel_modeset_checks(struct drm_atomic_state *state)
 	 * adjusted_mode bits in the crtc directly.
 	 */
 	if (IS_VALLEYVIEW(dev) || IS_BROXTON(dev) || IS_BROADWELL(dev)) {
-		if (IS_VALLEYVIEW(dev) || IS_BROXTON(dev))
-			ret = valleyview_modeset_global_pipes(state);
-		else
-			ret = broadwell_modeset_global_pipes(state);
+		ret = intel_modeset_global_pipes(state);
 
 		if (ret)
 			return ret;
-- 
1.9.1



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