[Intel-gfx] [PATCH v5 3/6] drm/i915/gen8: Add WaDisableCtxRestoreArbitration workaround

[Arun Siluvery]

In Indirect and Per context w/a batch buffer,
+WaDisableCtxRestoreArbitration

Signed-off-by: Rafael Barbalho <rafael.barbalho at intel.com>
Signed-off-by: Arun Siluvery <arun.siluvery at linux.intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c | 18 ++++++++----------
 1 file changed, 8 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 1d31eb5..8d5932a 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1110,10 +1110,11 @@ static int gen8_init_indirectctx_bb(struct intel_engine_cs *ring,
 
 	index = offset;
 
-	/* FIXME: fill one cacheline with NOOPs.
-	 * Replace these instructions with WA
-	 */
-	while (index < (offset + 16))
+	/* WaDisableCtxRestoreArbitration:bdw,chv */
+	wa_ctx_emit(batch, MI_ARB_ON_OFF | MI_ARB_DISABLE);
+
+	/* padding */
+        while (((unsigned long) (batch + index) % CACHELINE_BYTES) != 0)
 		wa_ctx_emit(batch, MI_NOOP);
 
 	/*
@@ -1143,13 +1144,10 @@ static int gen8_init_perctx_bb(struct intel_engine_cs *ring,
 
 	index = offset;
 
-	/* FIXME: fill one cacheline with NOOPs.
-	 * Replace these instructions with WA
-	 */
-	while (index < (offset + 16))
-		wa_ctx_emit(batch, MI_NOOP);
+	/* WaDisableCtxRestoreArbitration:bdw,chv */
+	wa_ctx_emit(batch, MI_ARB_ON_OFF | MI_ARB_ENABLE);
 
-	batch[index - 1] = MI_BATCH_BUFFER_END;
+	wa_ctx_emit(batch, MI_BATCH_BUFFER_END);
 
 	*num_dwords = index - offset;
 
-- 
2.3.0