[Intel-gfx] [PATCH] drm/i915: Reset request handling for gen8+

Daniel Vetter daniel at ffwll.ch
Thu Jun 18 08:00:30 PDT 2015


On Thu, Jun 18, 2015 at 01:22:36PM +0300, Mika Kuoppala wrote:
> Chris Wilson <chris at chris-wilson.co.uk> writes:
> 
> > On Thu, Jun 18, 2015 at 12:51:40PM +0300, Mika Kuoppala wrote:
> >> In order for gen8+ hardware to guarantee that no context switch
> >> takes place during engine reset and that current context is properly
> >> saved, the driver needs to notify and query hw before commencing
> >> with reset.
> >> 
> >> There are gpu hangs where the engine gets so stuck that it never will
> >> report to be ready for reset. We could proceed with reset anyway, but
> >> with some hangs with skl, the forced gpu reset will result in a system
> >> hang. By inspecting the unreadiness for reset seems to correlate with
> >> the probable system hang.
> >> 
> >> We will only proceed with reset if all engines report that they
> >> are ready for reset. If root cause for system hang is found and
> >> can be worked around with another means, we can reconsider if
> >> we can reinstate full reset for unreadiness case.
> >> 
> >> v2: -EIO, Recovery, gen8 (Chris, Tomas, Daniel)
> >> v3: updated commit msg
> >> v4: timeout_ms, simpler error path (Chris)
> >> 
> >> References: https://bugs.freedesktop.org/show_bug.cgi?id=89959
> >> References: https://bugs.freedesktop.org/show_bug.cgi?id=90854
> >> Testcase: igt/gem_concurrent_blit --r prw-blt-overwrite-source-read-rcs-forked
> >> Testcase: igt/gem_concurrent_blit --r gtt-blt-overwrite-source-read-rcs-forked
> >
> > Is this the new format for subtests?
> 
> No. It is me cutpasting from scripts. Daniel could you please
> fix while merging.

Done and queued for -next, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch


More information about the Intel-gfx mailing list