[Intel-gfx] [PATCH v5] drm/i915 : Added Programming of the MOCS

Damien Lespiau damien.lespiau at intel.com
Thu Jun 18 08:50:06 PDT 2015


On Thu, Jun 18, 2015 at 03:45:44PM +0100, Antoine, Peter wrote:
> Not a blocker. It gets a little more interesting, as the L3CC
> registers are shared across all engines, but is only saved in the RCS
> context. But, it is reset on the context switch when ELSP is set. So
> we would have to program it (i.e. MMIO) and also set it in the batch
> start for the RCS. Each ring would have to have a proper
> init_context() and these registers programmed there.

Hum, so yes, it's like you say. I think leaving a comment somewhere in
the init path telling us we rely on the RCS init_context() for all the
rings would be nice, but that's extra topping that can be done any time.

-- 
Damien


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