[Intel-gfx] [PATCH v6 5/5] drm/i915/gen8: Add WaClearSlmSpaceAtContextSwitch workaround
Daniel Vetter
daniel at ffwll.ch
Tue Jun 23 14:22:23 PDT 2015
On Tue, Jun 23, 2015 at 04:14:19PM +0100, Chris Wilson wrote:
> On Tue, Jun 23, 2015 at 03:46:57PM +0100, Arun Siluvery wrote:
> > In Indirect context w/a batch buffer,
> > WaClearSlmSpaceAtContextSwitch
> >
> > This WA performs writes to scratch page so it must be valid, this check
> > is performed before initializing the batch with this WA.
> >
> > v2: s/PIPE_CONTROL_FLUSH_RO_CACHES/PIPE_CONTROL_FLUSH_L3 (Ville)
> >
> > v3: GTT bit in scratch address should be mbz (Chris)
> >
> > Cc: Chris Wilson <chris at chris-wilson.co.uk>
> > Cc: Dave Gordon <david.s.gordon at intel.com>
> > Signed-off-by: Rafael Barbalho <rafael.barbalho at intel.com>
> > Signed-off-by: Arun Siluvery <arun.siluvery at linux.intel.com>
>
> Presuming the wa is still valid ;-)
> Acked-by: Chris Wilson <chris at chris-wilson.co.uk>
Queued for -next, thanks for the patch. And patch 6 ignored as requested.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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