[Intel-gfx] [PATCH] drm/i915: Add the ddi get cdclk code for BXT (v3)
Daniel Vetter
daniel at ffwll.ch
Wed Jun 24 06:11:48 PDT 2015
On Wed, Jun 24, 2015 at 03:49:22PM +0300, Ville Syrjälä wrote:
> On Tue, Jun 23, 2015 at 02:14:26PM -0700, Bob Paauwe wrote:
> > The registers and process differ from other platforms. If the hardware
> > was programmed incorrectly, this will return invalid cdclk values, which
> > should then cause reprogramming of the hardware.
> >
> > v2(Matt): Return 19.2 MHz when DE PLL is disabled (Ville)
> > v3: Make less assumptions about the hardware state (Ville)
> >
> > Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > Cc: Imre Deak <imre.deak at intel.com>
> > Cc: Matt Roper <matthew.d.roper at intel.com>
> > Signed-off-by: Bob Paauwe <bob.j.paauwe at intel.com>
> > Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
>
> Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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